54AC02 Quad 2-Input NOR Gate
July 1998
54AC02
Quad 2-Input NOR Gate
General Description
The ’AC02 contains four, 2-input NOR gates.
Features
I
CC
reduced by 50% on 54AC/74AC02 only
Outputs source/sink 24 mA
’ACT02 has TTL-compatible inputs
Standard Military Drawing (SMD)
— AC02: 5962-87612
n
For Military 54ACT02 device see 54ACTQ02
n
n
n
n
Logic Symbol
IEEE/IEC
DS100258-1
Pin Names
A
n
, B
n
O
n
Description
Inputs
Outputs
Connection Diagrams
Pin Assignment for DIP and Flatpak
Pin Assignment for LCC
DS100258-3
DS100258-2
FACT
™
is a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100258
www.national.com
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
= −0.5V
V
I
= V
CC
+ 0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
= −0.5V
V
O
= V
CC
+ 0.5V
DC Output Voltage (V
O
)
DC Output Source or Sink
Current (I
O
)
DC V
CC
or Ground Current per
Output Pin (I
CC
or I
GND
)
Storage Temperature (T
STG
)
−0.5V to +7.0V
−20 mA
+20 mA
−0.5V to V
CC
+ 0.5V
−20 mA
+20 mA
−0.5V to to V
CC
+ 0.5V
Junction Temperature (T
J
)
CDIP
175˚C
Recommended Operating
Conditions
Supply Voltage (V
CC
)
’AC
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
54AC
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
V
IN
from 30% to 70% of V
CC
V
CC
@
3.3V, 4.5V, 5.5V
2.0V to 6.0V
0V to V
CC
0V to V
CC
−55˚C to +125˚C
±
50 mA
±
50 mA
−65˚C to +150˚C
125 mV/ns
Note 1:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT
™
circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
Symbol
Parameter
V
CC
(V)
3.0
4.5
5.5
V
IL
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
3.0
4.5
5.5
V
OH
3.0
4.5
5.5
54AC
T
A
=
−55˚C to +125˚C
Guaranteed Limits
V
IH
Minimum High Level
Input Voltage
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
(Note 2)
V
IN
= V
IL
or V
IH
3.0
4.5
5.5
V
OL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
2.4
3.7
4.7
0.1
0.1
0.1
(Note 2)
V
IN
= V
IL
or V
IH
3.0
4.5
5.5
I
IN
I
OLD
I
OHD
I
CC
Maximum Input
Leakage Current
(Note 3) Minimum
Dynamic Output
Current
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
0.5
0.5
0.5
V
I
OL
V
I
= V
CC
, GND
V
OLD
= 1.65V Max
V
OHD
= 3.85V Min
V
IN
= V
CC
or GND
12 mA
24 mA
24 mA
µA
mA
mA
µA
V
I
OUT
= 50 µA
V
I
OH
−12 mA
−24 mA
−24 mA
V
I
OUT
= −50 µA
V
V
OUT
= 0.1V
or V
CC
− 0.1V
V
V
OUT
= 0.1V
or V
CC
− 0.1V
Units
Conditions
±
1.0
50
−50
40.0
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2
DC Characteristics for ’AC Family Devices
Note 2:
All outputs loaded; thresholds on input associated with output under test.
Note 3:
Maximum test duration 2.0 ms, one output loaded at a time.
(Continued)
Note 4:
I
IN
and I
CC
@
3.0V are guaranteed to be less than or equal to the respective limit
@
5.5V V
CC
.
I
CC
for 54AC
@
25˚C is identical to 74AC
@
25˚C.
AC Electrical Characteristics
Symbol
Parameter
V
CC
(V)
(Note 5)
3.3
5.0
t
PHL
Propagation Delay
3.3
5.0
Note 5:
Voltage Range 3.3 is 3.3V
±
0.3V
Voltage Range 5.0 is 5.0V
±
0.5V
54AC
T
A
= −55˚C to +125˚C
C
L
= 50 pF
Min
1.0
1.5
1.0
1.5
Max
9.0
7.0
9.0
7.5
ns
ns
Units
Fig. No.
t
PLH
Propagation Delay
Capacitance
Symbol
C
IN
C
PD
Parameter
Input Capacitance
Power Dissipation Capacitance
Typ
4.5
30.0
Units
pF
pF
Conditions
V
CC
= OPEN
V
CC
= 5.0V
3
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Physical Dimensions
inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
14 Lead Ceramic Dual-In-Line Package (D)
NS Package Number J14A
5
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