电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

XLL528001.000000X

产品描述LVDS Output Clock Oscillator, 1MHz Nom
产品类别无源元件    振荡器   
文件大小613KB,共27页
制造商IDT (Integrated Device Technology)
下载文档 详细参数 全文预览

XLL528001.000000X概述

LVDS Output Clock Oscillator, 1MHz Nom

XLL528001.000000X规格参数

参数名称属性值
是否Rohs认证不符合
Objectid145071309627
Reach Compliance Codecompliant
其他特性ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT
最长下降时间0.4 ns
频率调整-机械NO
频率稳定性20%
安装特点SURFACE MOUNT
端子数量6
标称工作频率1 MHz
最高工作温度70 °C
最低工作温度-20 °C
振荡器类型LVDS
输出负载100 OHM
物理尺寸5.0mm x 3.2mm x 1.1mm
最长上升时间0.4 ns
最大压摆率2.5 mA
最大供电电压2.625 V
最小供电电压2.375 V
标称供电电压2.5 V
表面贴装YES
最大对称度55/45 %

文档预览

下载PDF文档
XL Family of Low Phase Noise
Quartz-based PLL Oscillators
Datasheet
XL
Description
The IDT XL devices (XO and VCXO options) are ultra-precision
crystal oscillators with 750 to 890fs typical phase jitter over 12kHz
to 20MHz bandwidth. Available in a wide frequency range from
0.750MHz to 1350MHz, the XL series crystal oscillators utilize a
family of proprietary ASICs, with a key focus on noise reduction
technologies.
The 3rd order Delta Sigma Modulator reduces noise to the levels
that are comparable to traditional Bulk Quartz and SAW
oscillators. With short lead-time, low cost, low noise, wide
frequency range, excellent ambient performance, the XL devices
are an excellent choice over the conventional technologies. The
XL (XO option) devices have stabilities as tight as ±20ppm and
the XL (VCXO option) devices have ±50ppm APR. Either option
provides extremely quick delivery for both standard and custom
frequencies.
Features
Output types: LVDS, LVPECL, LVCMOS
Phase jitter (12kHz to 20MHz): 750fs to 890fs typical
Supply voltage: 2.5V or 3.3V
Package options:
3.2 × 2.5 × 1.0 mm (not available for VCXO)
5.0 × 3.2 × 1.2 mm
7.0 × 5.0 × 1.3 mm
Operating temperature: -20°C to +70°C
Frequency stability options: ±20, ±25, ±50, or ±100 ppm
(XO only)
±50ppm APR (VCXO only)
Operating temperature: -40°C to +85°C
Frequency stability options: ±25, ±50, or ±100 ppm
(XO only)
±50ppm APR (VCXO only)
Operating temperature: -40°C to +105°C (XO only)
Frequency stability options: ±50 or ±100 ppm
kV of 85ppm/volt typical from 0.5VDC to VDD (VCXO only)
Better than ±10% linearity for Vc range
Pin Assignments (XO option)
NOTE:
To minimize power supply line noise, a 0.01μF bypass capacitor should be placed between V
DD
(Pin 6) and GND (Pin 3) on 6-pin
devices, or V
DD
(Pin 4) and GND (Pin 2) on 4-pin devices.
OUT2
VDD
VDD
OUT
6
5
4
4
NC
1
E/D / NC
2
NC / E/D
3
GND
1
E/D
NC
Table 1. XO 6-pin Package
Table 2. XO 4-pin Package
Number
1
2
3
4
5
6
Name
E/D
NC
NC
E/D
GND
OUT
OUT2
V
DD
Description
Enable/Disable
[a][b]
No connect
No connect
Enable/Disable
[a][b]
Connect to ground
Output
Complementary output
Supply voltage
Number
1
2
3
4
Name
E/D
GND
OUT
V
DD
GND
OUT
3
2
Description
Enable/Disable
[a][b]
Connect to ground
Output
Supply voltage
[a] Pulled high internally.
[b] Low = output disabled.
See
Ordering Information (XO)
for more details.
1
September 7, 2018
©2018 Integrated Device Technology, Inc.

技术资料推荐更多

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 914  609  948  1603  2302  19  13  20  33  47 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved