TB1274BFG
TOSHIBA Bi-CMOS INTEGRATED CIRCUIT
SILICON MONOLITHIC
TB1274BFG
LUMINANCE,
CHROMA
AND
SYNCHRONIZING SIGNALS PROCESSOR IC
FOR PAL / NTSC / SECAM COLOR TV
TB1274BFG integrates luminance, chroma and synchronizing
signals processing circuits for PAL / NTSC / SECAM color TV
system.
TB1274BFG incorporates high performance picture quality
compensation circuits in luminance section, an automatic PAL
/ NTSC / SECAM discrimination and decode circuits in chroma
section, and an automatic 50 / 60 Hz discrimination circuit in
synchronizing section.
Besides a crystal oscillator generates 4.43MHz, 3.58MHz and
QFP48-P-1014-0.80
M/N-PAL clock signals internally for color demodulation. A
horizontal PLL circuit is also built in this IC.
Weight
: 0.83 g (Typ.)
PAL
/
SECAM
demodulation
circuits
which
are
adjustment-free circuits incorporates a 1H DL circuit inside for
operating the base band signal processing system.
Also, TB1274BFG makes it possible to set and to control various functions through the built-in I
2
C BUS
line.
FEATURES
LUMINANCE SECTION
•
Built-in chroma trap filter
•
Y delay line
•
Sharpness control
•
Sub-Contrast control (-/+ 2dB)
•
Black set-up
CHROMA SECTION
•
Built-in 1H delay circuit (PAL / SECAM base band
demodulation system)
•
One crystal color demodulation circuit (4.43MHz,
3.58MHz, M/N-PAL)
•
Automatic system discrimination system and
forced system mode
•
1H delay line also serves as comb filter in NTSC
demodulation
•
Built-in band-pass and take-off filter, SECAM bell
filter
•
Sub-Color control (-/+2dB)
SYNCHRONIZING SECTION
•
Built-in horizontal VCO resonator
•
Adjustment-free horizontal and vertical oscillation
by count-down circuit
•
Automatic vertical frequency discrimination
circuit
•
Noise detection circuit
OTHERS
•
Y/C out level control
•
4-channels inputs switching
•
2-input circuit for RGB
•
2-input circuit for Y/Cb/Cr
•
Y/Cb/Cr outputs
•
Cb/Cr offset adjustment
•
Built-in pre filters for A/D converter
1
2005-08-18
TB1274BFG
TERMINAL DESCRIPTIONS
(YC-VCC/SYNC-VCC/D-VDD=5V and Ta=25℃, unless otherwise specified)
PIN
INPUT / OUTPUT
PIN NAME
FUNCTION
INTERFACE CIRCUIT
No.
SIGNALS
32
2.5V
1
Input CVBS1/Y1 signal through a
CVBS1/Y1-IN
clamping capacitor.
1
250Ω
50μA
50μA
CVBS : 1Vp-p
Y : 1Vp-p(with sync)
DC : 1.8V
28
12
1kΩ
2
SYNC-IN
Input signal to synchronize.
2
1Vp-p (with sync)
DC : 1.7V
1.5V
16
32
100Ω
8kΩ
700μA
3
CVBS-OUT
CVBS or Y+C signal output pin.
3
50Ω
2Vp-p(with sync)
DC : 0.6V
28
12
120μA
4
VS
Output
pin
of
vertical
synchronizing signal.
Minimum pull-up resister is
6.8kΩ.
4
Hi
Low
50Ω
4.7V≦Hi≦5.2V
0V≦Low≦0.8V
16
32
5
COMB Y-IN
Input luminance signal from
Comb filter through a clamping
capacitor.
2.5V
5
250Ω
1Vp-p(with sync)
DC : 1.8V
28
6
D-VDD
Power
supply
pin
for
DDS/BUS/V-CD/H-CD sections.
Input chroma signal from Comb
filter
through
a
clamping
capacitor. When this pin is
connected to Vcc, color killer is
OFF and SECAM ID is ON
forcibly. (Forced SECAM mode)
Refer
to
FUNCTION
DESCRIPTION.
－
32
DC 5V
7
COMB C-IN
/ FORCED-S
40kΩ
7
250Ω
C
Forced-S
0.3Vp-p(Burst)
DC : 2.4V
4.0V≦Forced-S≦5.0V
(Th : 3.5V)
28
50kΩ
2.4V
40pF
20kΩ
3.5V
3
2005-08-18
TB1274BFG
PIN
No.
8
PIN NAME
D-GND
FUNCTION
GND
pin
for
DDS/BUS/V-CD/H-CD sections.
INTERFACE CIRCUIT
－
12
125Ω
INPUT / OUTPUT
SIGNALS
9
HS
20kΩ
Output
pin
of
horizontal
synchronizing signal.
Minimum pull-down resister is
2.7kΩ.
Hi
Low
9
50Ω
16
3.8V≦Hi≦4.6V
0≦Low≦1.0V
CP
H-BLK
Low
12
10
SCP
Sand Castle Pulse output pin.
The clamping pulse and the
horizontal blanking pulse are
outputted.
10
100Ω
50Ω
16
3.6V≦CP≦4.4V
1.6V≦H-BLK≦2.4V
0.0V≦Low≦0.8V
with pull-down
resister (7.5kΩ)
12
100Ω
11
Yvi-OUT
8kΩ
Output pin to synchronize
inputs. Y signal from video-SW is
outputted.
11
50Ω
1Vp-p(with sync)
DC : 2.1V
16
12
SYNC-VCC
Power supply pin for
SYNC/HVCO sections.
liner
－
6
100kΩ
DC 5V
15kΩ
13
3kΩ
SCL
SCL
2.7V
13
SCL
SCL pin for I
2
CBUS.
8
6
100kΩ
14
50Ω
3kΩ
SDA
ACK
SDA
2.7V
14
SDA
SDA pin for I
2
CBUS.
15kΩ
8
30kΩ
15
YS3
(RGB1-in)
16
SYNC-GND
Pin to switch main signals and
RGB1 signals. If the voltage of
this pin is HI and the
RGB1-ENB data is “enable” via
I
2
C BUS, RGB1-IN is selected.
And its status is responded to
the Read Bus data.
GND pin for liner SYNC/HVCO
sections.
32
6kΩ
15
1.0V≦RGB1≦5.0V
(Th : 0.7V)
28
－
4
2005-08-18
TB1274BFG
PIN
No.
PIN NAME
FUNCTION
INTERFACE CIRCUIT
32
INPUT / OUTPUT
SIGNALS
17
Cr1-IN
240Ω
17,18
240Ω
240Ω
18
Cb1-IN
2.5V
28
Input Y1/Cb1/Cr1 signal through
a clamping capacitor.
(Selected by I
2
C BUS.)
When Y/Cb/Cr1-IN is active, Y1
signal is synchronized.
32
1kΩ
Y : 1Vp-p(with sync)
DC : 1.7V
Cb/Cr : 0.7Vp-p(100％
color bar)
DC : 2.5V
1kΩ
19
Y1-IN
19
5kΩ
28
32
20
CLP-FIL
Connect a filter for clamping Y
signal.
20
10kΩ
50Ω
28
100Ω
21
22
23
Y-OUT
Cb-OUT
Cr-OUT
Y/Cb/Cr output pins.
The
output’s
amplitudes
is
variable from 0.5 to 1.6Vp-p by
I
2
C BUS.
21,22,23
50Ω
32
DC ;
Y : 1.3V, Cb/Cr : 1.8V
AC ;
Y
:
0.7Vp-p(0dB,non-sync)
Cb/Cr : 0.7Vp-p(0dB)
700µA
28
32
10kΩ
24
YS1
(YCbCr2-in)
Pin to switch main signals and
YCbCr2 signals.
30kΩ
24
6.1kΩ
1.0V≦YCbCr2≦5.0V
(Th : 0.7V)
28
5
2005-08-18
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