74VHCT240A Octal Buffer/Line Driver with 3-STATE Outputs
May 2007
74VHCT240A
Octal Buffer/Line Driver with 3-STATE Outputs
Features
■
High Speed: t
PD
=
5.6ns (Typ.) at V
CC
=
5V
■
Power down protection is provided on inputs and
tm
General Description
The VHCT240A is an advanced high speed CMOS octal
bus transceiver fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. The VHCT240A is an
inverting 3-STATE buffer having two active-LOW output
enables. This device is designed to be used as 3-STATE
memory address drivers, clock drivers, and bus oriented
transmitter/ receivers.
Protection circuits ensure that 0V to 7V can be applied to
the input and output
(1)
pins without regard to the supply
voltage. These circuits prevent device destruction due to
mismatched supply and input/output voltages. This
device can be used to interface 5V to 3V systems and
two supply systems such as battery back up.
Note:
1. Outputs in OFF-State
outputs
■
Low power dissipation: I
CC
=
4
µ
A (Max.) @ T
A
=
25°C
■
Pin and function compatible with 74HCT240
Ordering Information
Order Number
74VHCT240AM
74VHCT240ASJ
74VHCT240AMTC
Package
Number
M20B
M20D
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
©1997 Fairchild Semiconductor Corporation
74VHCT240A Rev. 1.3
www.fairchildsemi.com
74VHCT240A Octal Buffer/Line Driver with 3-STATE Outputs
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
OE
1
, OE
2
I
0
–I
7
O
0
–O
7
Inputs
Outputs 3-STATE Outputs
Description
3-STATE Output Enable
Truth Tables
Inputs
OE
1
L
L
H
I
n
L
H
X
Outputs
(Pins 12, 14, 16, 18)
H
L
Z
Inputs
OE
1
L
L
H
I
n
L
H
X
Outputs
(Pins 3, 5, 7, 9)
H
L
Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
©1997 Fairchild Semiconductor Corporation
74VHCT240A Rev. 1.3
www.fairchildsemi.com
2
74VHCT240A Octal Buffer/Line Driver with 3-STATE Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
Supply Voltage
DC Input Voltage
DC Output Voltage
Note 2
Note 3
I
IK
I
OK
I
OUT
I
CC
T
STG
T
L
Input Diode Current
Output Diode Current
(4)
DC Output Current
DC V
CC
/ GND Current
Storage Temperature
Parameter
Rating
–0.5V to +7.0V
–0.5V to +7.0V
–0.5V to V
CC
+ 0.5V
–0.5V to +7.0V
–20mA
±20mA
±25mA
±75mA
–65°C to +150°C
260°C
Lead Temperature (Soldering, 10 seconds)
Recommended Operating Conditions
(5)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IN
V
OUT
Supply Voltage
Input Voltage
Output Voltage
Note 2
Note 3
T
OPR
t
r
, t
f
Operating Temperature
Parameter
Rating
4.5V to +5.5V
0V to +5.5V
0V to V
CC
0V to +5.5V
–40°C to +85°C
0ns/V ~ 20ns/V
Input Rise and Fall Time, V
CC
=
5.0V ± 0.5V
Notes:
2. HIGH or LOW state. I
OUT
absolute maximum rating must be observed.
3. When outputs are in OFF-State or when V
CC
=
0V.
4. V
OUT
<
GND, V
OUT
>
V
CC
(Outputs Active).
5. Unused inputs must be held HIGH or LOW. They may not float.
©1997 Fairchild Semiconductor Corporation
74VHCT240A Rev. 1.3
www.fairchildsemi.com
3
74VHCT240A Octal Buffer/Line Driver with 3-STATE Outputs
DC Electrical Characteristics
T
A
=
25°C
Symbol
V
IH
V
IL
V
OH
V
OL
I
OZ
I
IN
I
CC
I
CCT
I
OFF
T
A
=
–40°C
to +85°C
Min.
2.0
2.0
0.8
0.8
0.8
0.8
4.40
3.80
0.1
0.36
0.1
0.44
±2.5
±1.0
40.0
1.50
5.0
µA
µA
µA
mA
µA
V
V
V
Parameter
HIGH Level Input
Voltage
LOW Level Input
Voltage
HIGH Level Output
Voltage
LOW Level Output
Voltage
3-STATE Output
Off-State Current
Input Leakage
Current
Quiescent Supply
Current
Maximum I
CC
/ Input
Output Leakage
Current (Power
Down State)
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
4.5
5.5
0–5.5
5.5
5.5
0.0
Conditions
Min.
2.0
2.0
Typ.
Max.
Max. Units
V
V
IN
=
V
IH
I
OH
=
–50µA
or V
IL
I
OH
=
–8mA
V
IN
=
V
IH
I
OL
=
50µA
or V
IL
I
OL
=
8mA
V
IN
=
V
IH
or V
IL
,
V
OUT
=
V
CC
or GND
V
IN
=
5.5V or GND
V
IN
=
V
CC
or GND
V
IN
=
3.4V, Other
Input
=
V
CC
or GND
V
OUT
=
5.5V
4.40
3.94
4.50
0.0
±0.25
±0.1
4.0
1.35
0.5
Noise Characteristics
T
A
=
25°C
Symbol
V
OLP(6)
V
OLV(6)
V
IHD(6)
V
ILD(6)
Parameter
Quiet Output Maximum
Dynamic V
OL
Quiet Output Minimum
Dynamic V
OL
Minimum HIGH Level
Dynamic Input Voltage
Maximum LOW Level
Dynamic Input Voltage
V
CC
(V)
5.0
5.0
5.0
5.0
Conditions
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
C
L
=
50pF
Typ.
0.9
–0.9
Limits
1.1
–1.1
2.0
0.8
Units
V
V
V
V
Note:
6. Parameter guaranteed by design.
©1997 Fairchild Semiconductor Corporation
74VHCT240A Rev. 1.3
www.fairchildsemi.com
4
74VHCT240A Octal Buffer/Line Driver with 3-STATE Outputs
AC Electrical Characteristics
T
A
=
25°C
Symbol
t
PLH
, t
PHL
t
PZL
, t
PZH
t
PLZ
, t
PHZ
T
A
=
–40°C
to +85°C
7.8
8.8
1.0
1.0
1.0
1.0
1.0
9.0
10.0
12.5
13.5
13.0
1.0
10
ns
ns
pF
pF
pF
ns
ns
Parameter
Propagation Delay
Time
3-STATE Output
Enable Time
3-STATE Output
Disable Time
V
CC
(V)
5.0 ± 0.5
Conditions
C
L
=
15pF
C
L
=
50pF
Min.
Typ. Max. Min. Max. Units
5.6
6.1
6.5
7.3
7.0
5.0 ± 0.5 R
L
=
1kΩ C
L
=
15pF
C
L
=
50pF
5.0 ± 0.5 R
L
=
1kΩ C
L
=
50pF
5.0 ± 0.5
(7)
V
CC
=
Open
V
CC
=
5.0V
(8)
10.4
11.4
11.4
1.0
t
OSLH
, t
OSHL
Output to Output
Skew
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance
4
9
19
10
Notes:
7. Parameter guaranteed by design. t
OSLH
=
|t
PLH max
– t
PLH min
|; t
OSHL
=
|t
PHL max
– t
PHL min
|
8. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load. Average operating current can be obtained by the equation:
I
CC
(Opr.)
=
C
PD
• V
CC
• f
IN
+ I
CC
/ 8 (per F/F). The total C
PD
when n pcs. of the Octal D Flip-Flop operates
can be calculated by the equation: C
PD
(total)
=
20 + 12n
©1997 Fairchild Semiconductor Corporation
74VHCT240A Rev. 1.3
www.fairchildsemi.com
5
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