QTR:
2013-00285
Wafer Process:
PHEMT-J
Introduction
Rev:
05
The testing performed for this report is designed to accelerate the predominant failure mode, electro-migration
(EM), for the devices under test. The devices are stressed at high temperature and DC biased to simulate a lifetime
of use at typical operating temperatures. Using the Arrhenius equation, the acceleration factor (AF) is calculated for
the stress testing based on the stress temperature and the typical use operating temperature.
This report is intended to summarize all of the High Temperature Operating Life Test (HTOL) data for the
PHEMT-J process. The FIT/MTTF data contained in this report includes all the stress testing performed on this
process to date and will be updated periodically as additional data becomes available. Data sheets for the tested
devices can be found at
www.hittite.com.
Glossary of Terms & Definitions:
1. HTOL:
High Temperature Operating Life. This test is used to determine the effects of bias conditions and
temperature on semiconductor devices over time. It simulates the devices’ operating condition in an accelerated
way, through high temperature and/or bias voltage, and is primarily for device qualification and reliability
monitoring. This test was performed in accordance with JEDEC JESD22-A108.
2. HTSL:
High Temperature Storage Life. Devices are subjected to 1000 hours at 150
o
C per JESD22-A103.
3. MSL:
Moisture sensitivity level pre-conditioning is performed per JESD22-A113.
4. Operating Junction Temp (T
oj
):
Temperature of the die active circuitry during typical operation.
5. Stress Junction Temp (T
sj
):
Temperature of the die active circuitry during stress testing.
6. UHAST:
Unbiased Highly Accelerated Stress Test. Devices are subjected to 96 hours of 85% relative humidity at
a temperature of 130°C and pressure (18.6 PSIG). This test is performed in accordance with JESD22-A118.
7. Temperature Cycle:
Devices are subjected to 500 cycles of -65°C to 150°C. This test is performed in accordance
with JESD22-A104.
8. THB:
Temperature Humidity Bias. Devices are subjected to 1000 hours of 85% relative humidity at a
temperature of 85°C and electrical bias. This test is performed in accordance with JESD22-A101.
QTR:
2013-00285
Wafer Process:
PHEMT-J
Qualification Sample Selection:
Rev:
05
All qualification devices used were manufactured and tested on standard production processes and met pre-stress
acceptance test requirements.
Summary of Qualification Tests:
HMC6488A / HMC349A (QTR2012-00017)
TEST
Initial Electrical
HTOL, 1000 hours
Post HTOL Electrical Test
HTSL, 1000 hours
Post HTSL Electrical Test
QTY
IN
80
80
80
46
46
QTY
OUT
80
80
80
46
46
PASS/FAIL
Complete
Complete
Pass
Complete
Pass
NOTES
HMC6484 / HMC273A (QTR2012-00042)
TEST
Initial Electrical
HTOL, 1000 hours
Post HTOL Electrical Test
HTSL, 1000 hours
Post HTSL Electrical Test
QTY
IN
80
80
80
80
80
QTY
OUT
80
80
80
80
80
PASS/FAIL
Complete
Complete
Pass
Complete
Pass
NOTES
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