Quad Driver Incl. Short-Circuit Signaling
FZL 4146
Bipolar IC
Features
q
q
q
Short-circuit signaling
Four driver circuits for driving power transistors
Turn-ON threshold setting from 1.5 to 7 V
P-DSO-20-7
Type
FZL 4146 G
General Description
Ordering Code
Q67000-H8743
Package
P-DSO-20-7 (SMD)
The IC comprises four driver circuits capable of driving power transistors (PNP or
PMOS). The output transistors are protected against short-circuit to ground and supply
voltage. The turn-ON threshold can be set from 1.5 V to 7 V. Overload at one or several
outputs will be indicated at pin SQ (signaling output). The corresponding power
transistors are then protected by changeover to clock-governed operation.
Circuit Description
Each driver circuit has one active high driver input Dl and a common enable input ENA
(active high) is provided for all stages. The Q output is designed to drive the output
transistors. The load current is sampled and, if necessary, limited via pin W. If the load
current exceeds the preset value, the output stage switches off. Switching-ON again is
provided by the built-in clock generator T. Its operation requires an external capacitor
C
e
at pin CE. If
C
e
is bridged by a break-key, switching-ON can only be carried out by
operating this key. The duty cycle of the clock generator is 1:47 (e.g. 45
µs/2.1
ms with
C
e
= 10 nF). The clock generator is privileged versus the current sensor shut down.
When the supply is connected, the internal RS-FF goes into the state corresponding to
the released output.
Semiconductor Group
1
03.96
FZL 4146
The turn-ON threshold at input Dl and ENA can be set via pin TS from 1.5 to 7 V.
V
TS
= 0 V … 1.5 V
V
TS
= 1.5 V … 7 V
V
TS
=
V
S
Turn-ON threshold = 1.5 V
Turn-ON threshold =
V
TS
Turn-ON threshold = 7 V
Inputs Dl, ENA and W are proof against line break, i.e. an open input at Dl or ENA
corresponds to input L, open input W corresponds to overcurrent. If input TS is open, the
highest turn-ON threshold is provided.
The internal current supply B and the undervoltage monitor UV ensure that in case of a
supply voltage that is below the
V
S
turn-OFF threshold, outputs Q and SQ are disabled
and the inputs go high-impedance. Basic functioning is possible within the range from
V
S
turn-OFF threshold to 4.5 V.
In case of overcurrent or short-circuit to ground at any output stage the signaling output
(SQ) will go low. In clock-governed operation (i.e. when there is automatic switching-ON
by the clock and not by a key), SQ goes high and low at the clock rate as long as a short-
circuit or overload is present. SQ is an open-collector output.
Any input and output is ESD proof within the limit values.
Semiconductor Group
2
FZL 4146
Pin Configuration
(top view)
P-DSO-20-7
Semiconductor Group
3
FZL 4146
Pin Definitions and Functions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Symbol
CE
ENA
DI1
DI2
N.C.
GND
DI3
DI4
TS
SQ
W4
Q4
W3
Q3
Function
Pin for
C
e
Enable input for drivers 1 to 4
Input driver 1
Input driver 2
Not connected
Ground
Input driver 3
Input driver 4
Threshold changeover for all inputs
Short-circuit signaling output for drivers 1 to 4
Output current sensor driver 4
Output driver 4
Output current sensor driver 3
Output driver 3
Supply voltage
Ground
Output current sensor driver 2
Output driver 2
Output current sensor driver 1
Output driver 1
V
S
GND
W2
Q2
W1
Q1
Semiconductor Group
4
FZL 4146
Block Diagram
Semiconductor Group
5
嵌入式系统
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