19-0858; Rev 1; 1/10
KIT
ATION
EVALU
BLE
AVAILA
High-Power, Quad, PSE Controller
for Power-Over-Ethernet
General Description
Features
o
IEEE 802.3af Compliant/Pre-IEEE 802.3at
Compatible
o
Instantaneous Readout of Port Current Through
I
2
C Interface
o
High-Power Mode Enables Up to 45W Per Port
o
High-Capacitance Detection for Legacy Devices
o
Pin Compatible to MAX5945 and
LTC4258/LTC4259A
o
Four Independent Power-Switch Controllers
o
PD Detection and Classification
o
Supports Both DC and AC Load Removal
Detections
o
I
2
C-Compatible, 3-Wire Serial Interface
o
Current Foldback and Duty-Cycle-Controlled
Current Limit
o
Open-Drain
INT
Signal
o
Direct Fast Shutdown Control Capability
MAX5952
The MAX5952 is a quad -48V power controller
designed for use in IEEE
®
802.3af-compliant/pre-IEEE
802.3at-compatible power-sourcing equipment (PSE).
This device provides powered device (PD) discovery,
classification, current limit, DC and AC load disconnect
detections in compliance with the IEEE 802.3af stan-
dard. The MAX5952 is pin compatible with MAX5945/
LTC4258/LTC4259A PSE controllers and provides addi-
tional features.
The MAX5952 features high-power mode that provides
up to 45W per port. The MAX5952 provides instanta-
neous readout of each port current through the I
2
C inter-
face. The MAX5952 also provides high-capacitance
detection for legacy PDs.
The device features an I
2
C-compatible, 3-wire serial inter-
face, and is fully software configurable and programma-
ble. The class-overcurrent detection function enables
system power management to detect if a PD draws more
than the allowable current. The MAX5952’s extensive pro-
grammability enhances system flexibility, enables field
diagnosis, and allows for uses in other applications.
The MAX5952 provides four operating modes to suit dif-
ferent system requirements. Auto mode allows the device
to operate automatically without any software supervision.
Semi-automatic mode automatically detects and classi-
fies a device connected to a port after initial software acti-
vation, but does not power up that port until instructed to
by software. Manual mode allows total software control of
the device and is useful for system diagnostics.
Shutdown mode terminates all activities and securely
turns off power to the ports.
The MAX5952 provides input undervoltage lockout
(UVLO), input undervoltage detection, input overvolt-
age lockout, overtemperature detection, output voltage
slew-rate limit during startup, power-good status, and
fault status. The MAX5952’s programmability includes
startup timeout, overcurrent timeout, and load-discon-
nect detection timeout.
The MAX5952 is available in a 36-pin SSOP package and
is rated for both extended (-40°C to +85°C) and upper
commercial (0°C to +85°C) temperature ranges.
Ordering Information
PART
MAX5952AEAX+*
MAX5952AUAX+
MAX5952CEAX+*
MAX5952CUAX+*
TEMP RANGE
-40°C to +85°C
0°C to +85°C
-40°C to +85°C
0°C to +85°C
PIN-PACKAGE
36 SSOP
36 SSOP
36 SSOP
36 SSOP
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*Future
product—contact factory for availability.
Applications
Power-Sourcing Equipment (PSE)
Switches/Routers
Midspan Power Injectors
IEEE is a registered service mark of the Institute of Electrical
and Electronics Engineers, Inc.
________________________________________________________________
Maxim Integrated Products
1
Pin Configuration and Selector Guide appear at end of data
sheet.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
High-Power, Quad, PSE Controller
for Power-Over-Ethernet
MAX5952
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to V
EE
, unless otherwise noted.)
AGND, DGND, DET_, V
DD
,
RESET,
A3–A0,
SHD_,
OSC,
SCL, SDAIN, and AUTO ......................................-0.3V to +80V
OUT_........................................................-12V to (AGND + 0.3V)
GATE_ (internally clamped) (Note 1) ..................-0.3V to +11.4V
SENSE_ ..................................................................-0.3V to +24V
V
DD
,
RESET,
MIDSPAN, A3–A0,
SHD_,
OSC, SCL,
SDAIN and AUTO to DGND ..................................-0.3V to +7V
INT
and SDAOUT to DGND....................................-0.3V to +12V
AGND to DGND........................................................-0.3V to +7V
Maximum Current into
INT,
SDAOUT, DET_ .......................80mA
Maximum Power Dissipation (T
A
= +70°C)
36-Pin SSOP (derate 11.4mW/°C above +70°C) ..........941mW
Operating Temperature Ranges:
MAX5952_EAX..............…………………………-40°C to +85°C
MAX5952_UAX ....................................................0°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1:
GATE_ is internally clamped to 11.4V above V
EE
. Driving GATE_ higher than 11.4V above V
EE
may damage the device.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
AGND
= 32V to 60V, V
EE
= 0V, V
DD
to V
DGND
= +3.3V, all voltages are referenced to V
EE
, unless otherwise noted. Typical values are at
V
AGND
= +48V, V
DGND
= +48V, V
DD
= (V
DGND
+ 3.3V), T
A
= +25°C. Currents are positive when entering the pin and negative other-
wise.) (Note 2)
PARAMETER
POWER SUPPLIES
V
AGND
Operating Voltage Range
V
DGND
V
DD
V
DD
to V
DGND
, V
DGND
= V
AGND
V
DD
to V
DGND
, V
DGND
= V
EE
V
OUT_
= V
EE
, V
SENSE
_ = V
EE
, DET
_
= AGND,
all logic inputs open, SCL = SDAIN = V
DD
.
INT
and SDAOUT open. Measured at AGND in
power mode after GATE_ pullup
All logic inputs high, measured at V
DD
Power mode, gate drive on, V
GATE
= V
EE
SHD_
= DGND, V
GATE_
= V
EE
+ 10V
V
SENSE
= 600mV, V
GATE_
= V
EE
+ 2V
V
GATE
- V
EE
, power mode, gate drive on
9
-40
30
V
AGND
- V
EE
32
0
1.71
3.0
60
60
5.50
5.5
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Currents
I
EE
4.8
6.8
mA
I
DIG
GATE DRIVER AND CLAMPING
GATE_ Pullup Current
Weak GATE_ Pulldown Current
Maximum Pulldown Current
External Gate Drive
I
PU
I
PDW
I
PDS
V
GS
3.0
-50
42
70
10
5.6
-60
55
11
µA
µA
mA
V
2
_______________________________________________________________________________________
High-Power, Quad, PSE Controller
for Power-Over-Ethernet
ELECTRICAL CHARACTERISTICS (continued)
(V
AGND
= 32V to 60V, V
EE
= 0V, V
DD
to V
DGND
= +3.3V, all voltages are referenced to V
EE
, unless otherwise noted. Typical values are at
V
AGND
= +48V, V
DGND
= +48V, V
DD
= (V
DGND
+ 3.3V), T
A
= +25°C. Currents are positive when entering the pin and negative other-
wise.) (Note 2)
PARAMETER
CURRENT LIMIT
IVEE = 00
Maximum V
SENSE_
allowed
during current limit, V
OUT_
= 0V
(ICUT = 000) (Note 3)
IVEE = 01
IVEE = 10
IVEE = 11
ICUT = 000
(Class 0/3)
ICUT =110
(Class 1)
Overcurrent Threshold After
Startup
Overcurrent V
SENSE_
threshold
allowed for t
≤
t
FAULT
after
startup; V
OUT_
= 0V,
(IVEE = 00)
ICUT = 111
(Class 2)
ICUT = 001
ICUT = 010
ICUT = 011
ICUT = 100
ICUT =101
ICUT = 000,
ICUT = 110,
ICUT = 111
ICUT =
001…101
202
192
186
170
177
47
86
265
310
355
398
443
212
202
190
180
186
55
94
280
327
374
419
466
28
V
10
220
212
mV
200
190
196
62
101
mV
295
345
395
440
488
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX5952
Current-Limit Clamp Voltage
V
SU_LIM
V
FLT_LIM
Foldback Initial OUT_ Voltage
V
FLBK_ST
V
OUT_
- V
EE
, above which the
current-limit trip voltage starts
folding back, IVEE = 00
Foldback Final OUT_ Voltage
Minimum Foldback
Current-Limit Threshold
SENSE_ Input Bias Current
IVEE = 00, ICUT = 000, V
OUT
- V
EE
above
V
FLBK_END
which the current-limit trip voltage reaches
V
TH_FB
V
TH_FB
V
OUT_
= V
AGND
= 60V, IVEE = 00, ICUT = 000
V
SENSE_
= V
EE
-2
50
V
64
+2
mV
µA
_______________________________________________________________________________________
3
High-Power, Quad, PSE Controller
for Power-Over-Ethernet
MAX5952
ELECTRICAL CHARACTERISTICS (continued)
(V
AGND
= 32V to 60V, V
EE
= 0V, V
DD
to V
DGND
= +3.3V, all voltages are referenced to V
EE
, unless otherwise noted. Typical values are at
V
AGND
= +48V, V
DGND
= +48V, V
DD
= (V
DGND
+ 3.3V), T
A
= +25°C. Currents are positive when entering the pin and negative other-
wise.) (Note 2)
PARAMETER
SUPPLY MONITORS
V
EE
Undervoltage Lockout
V
EE
Undervoltage Lockout
Hysteresis
V
EE
Overvoltage Lockout
V
EE
Overvoltage Lockout
Hysteresis
V
EE
Undervoltage
V
EEUVLO
V
EEUVLOH
V
AGND
- V
EE
, V
AGND
- V
EE
increasing
Ports shut down if V
AGND
- V
EE
< V
UVLO
-
V
EEUVLOH
V
EE_OV
event bit sets and ports shut down if
V
AGND
- V
EE
> V
EE_OV
, V
AGND
increasing
28.5
3
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
EE_OV
62.5
V
V
OVH
V
EE_UV
V
EE_UV
event bit is set if V
AGND
- V
EE
< V
EE_UV
,
V
EE
increasing
V
DD_OV
event bit is set if
V
DD
- V
DGND
> V
DD_OV
;
V
DD
increasing
V
DD_OV
is set if V
DD
- V
DGND
> V
DD_UV
, V
DD
decreasing
MAX5952A
MAX5952C
MAX5952A
MAX5952C
1
40
3.82
V
V
V
DD
Overvoltage
V
DD_OV
V
5.7
2.7
V
4.2
2
120
V
mV
V
DD
Undervoltage
V
DD_UV
V
DD
Undervoltage Lockout
V
DD
Undervoltage Lockout
Hysteresis
Thermal Shutdown Threshold
V
DDUVLO
V
DDHYS
Device operates when V
DD
- V
DGND
>
V
DDUVLO
, V
DD
increasing
T
SHD
Ports shut down and device resets if its
junction temperature exceeds this limit,
temperature increasing (Note 4)
Thermal hysteresis, temperature decreasing
(Note 5)
V
OUT
= V
AGND
, all modes
OUT_ discharge current, detection and
classification off, port shutdown,
V
OUT_
= V
AGND
- 2.8V
V
OUT_
- V
EE
, OUT_ decreasing
Minimum time PGOOD has to be high to set
bit in register 10h
200
1.5
150
°C
Thermal Shutdown Hysteresis
OUTPUT MONITOR
OUT_ Input Current
Idle Pullup Current at OUT_
PGOOD High Threshold
PGOOD Hysteresis
PGOOD Low-to-High Glitch
Filter
T
SHDH
20
°C
I
BOUT
I
DIS
PG
TH
PG
HYS
t
PGOOD
2
260
2.0
220
3
2.5
µA
µA
V
mV
ms
4
_______________________________________________________________________________________
High-Power, Quad, PSE Controller
for Power-Over-Ethernet
ELECTRICAL CHARACTERISTICS (continued)
(V
AGND
= 32V to 60V, V
EE
= 0V, V
DD
to V
DGND
= +3.3V, all voltages are referenced to V
EE
, unless otherwise noted. Typical values are at
V
AGND
= +48V, V
DGND
= +48V, V
DD
= (V
DGND
+ 3.3V), T
A
= +25°C. Currents are positive when entering the pin and negative other-
wise.) (Note 2)
PARAMETER
LOAD DISCONNECT
DC Load Disconnect
Threshold
AC Load Disconnect
Threshold (Note 6)
Oscillator Buffer Gain
OSC Fail Threshold (Note 7)
OSC Input Impedance
Load Disconnect Timer
DETECTION
Detection Probe Voltage
(First Phase)
Detection Probe Voltage
(Second Phase)
Current-Limit Protection
V
DPH1
V
DPH2
I
DLIM
V
AGND
- V
DET_
during the first detection
phase
V
AGND
- V
DET_
during the second detection
phase
V
DET_
= V
AGND
, during detection, measure
current through DET_
If V
AGND
- V
OUT
< V
DCP
after the first
detection phase a short circuit to AGND is
detected
First point measurement current threshold for
open condition
(Note 9)
Detection rejects lower values
Detection rejects higher values
V
AGND
- V
DET_
during classification
DET_ = AGND, during classification, measure
current through DET_
Class 0, Class 1
Classification Current
Thresholds
I
CL
Classification current
thresholds between
classes
Class 1, Class 2
Class 2, Class 3
Class 3, Class 4
Class 4, Class 5
32
16
68
5.5
13
21
31
45
6.5
14.5
23
33
48
20
81
7.5
16
25
35
51
mA
19.0
3.8
9.0
1.5
4
9.3
1.75
4.2
9.6
2.0
V
V
mA
V
DCTH
I
ACTH
A
OSC
V
OSC_FAIL
Z
OSC
t
DISC
Minimum V
SENSE
allowed before disconnect
(DC disconnect active), V
OUT_
= 0V
Current into DET_, for I < I
ACTH
the port
powers off, ACD_EN_ bit = H; V
OSC_IN
= 2.2V
V
DET_
/V
OSC
, ACD_EN_ bit = H
Port does not power on if V
OSC
< V
OSC_FAIL
and ACD_EN_ bit is high
OSC input impedance when all the ACD_EN_
are active
Time from V
SENSE
< V
DCTH
to gate shutdown
(Note 8)
2.5
300
2.9
1.8
100
300
400
3.75
320
3.0
5.0
350
3.1
2.2
mV
µA
V/V
V
kΩ
ms
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX5952
Short-Circuit Threshold
V
DCP
1
V
Open-Circuit Threshold
Resistor Detection Window
Resistor Rejection Window
CLASSIFICATION
Classification Probe Voltage
Current-Limit Protection
I
D_OPEN
R
DOK
R
DBAD
12.5
26.5
15.2
µA
kΩ
kΩ
V
CL
I
CILIM
V
mA
_______________________________________________________________________________________
5
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