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P1820-A-08TR

产品描述Video Clock Generator, 80MHz, CMOS, PDSO8, TSSOP-8
产品类别嵌入式处理器和控制器    微控制器和处理器   
文件大小429KB,共11页
制造商ALSC [Alliance Semiconductor Corporation]
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P1820-A-08TR概述

Video Clock Generator, 80MHz, CMOS, PDSO8, TSSOP-8

P1820-A-08TR规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称ALSC [Alliance Semiconductor Corporation]
零件包装代码SOIC
包装说明TSSOP, TSSOP8,.25
针数8
Reach Compliance Codeunknown
ECCN代码EAR99
JESD-30 代码R-PDSO-G8
JESD-609代码e0
长度4.4 mm
端子数量8
最高工作温度70 °C
最低工作温度
最大输出时钟频率80 MHz
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP8,.25
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源3.3 V
主时钟/晶体标称频率80 MHz
认证状态Not Qualified
座面最大高度1.2 mm
标称供电电压3.3 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层Tin/Lead (Sn/Pb)
端子形式GULL WING
端子节距0.65 mm
端子位置DUAL
宽度3 mm
uPs/uCs/外围集成电路类型CLOCK GENERATOR, VIDEO

文档预览

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PRELIMINARY Specification
Alliance Semiconductor®
P1818/19/20/21/22
Low Power Mobile VGA EMI Reduction IC
FEATURES
FCC approved method of EMI attenuation
Provides up to 15 dB EMI reduction
Generates a low EMI spread spectrum clock
and a non-spread
Reference Clock
of the
input frequency
Optimized for frequency range from 10 MHz
to 170 MHz
P1818: 10 MHz to 20 MHz
P1819: 20 MHz to 40 MHz
P1820: 40 MHz to 80 MHz
P1821: 10 MHz to 40 MHz
P1822: 40 MHz to 170 MHz
Low inherent cycle-to-cycle jitter
8
spread % selections:
+/-0.625% to –3.5%
3.3V operating voltage
CMOS/TTL compatible inputs and outputs
Ultra low power
CMOS design
TBD mA @3.3V, 10 MHz
TBD mA @3.3V, 14 MHz
TBD mA @3.3V, 27MHz
Supports notebook VGA and other LCD timing
controller applications
Power Down
function for mobile application
Products are available for industrial
temperature range.
Available in 8 pin SOIC and TSSOP
Internal loop filter minimizes external
components and board space
Selectable spread options:
Down Spread
and
Center Spread
PRODUCT DESCRIPTION
The P18XX is a versatile spread spectrum
frequency modulator designed specifically for a
wide range of input clock frequencies from 10
MHz to 170 MHz (see Table 1.1). The P18XX can
generate an EMI reduced clock from crystal,
ceramic resonator, or system clock. The P18XX-A
to -H offers various combinations of spread
options and percentage deviations (see Table
1.2). These combinations include Down Spread,
Center Spread and percentage deviation range
from +/-0.625% to -3.50%.
The P18XX reduces electromagnetic interference
(EMI) at the clock source, allowing a system wide
EMI reduction for all the down stream clocks and
data dependent signals.
The P18XX allows
significant system cost savings by reducing the
number of circuit board layers, ferrite beads,
shielding, and other passive components that are
traditionally required to pass EMI regulations.
The P18XX modulates the output of a single PLL
in order to “spread” the bandwidth of a
synthesized clock, thereby decreasing the peak
amplitudes of its harmonics. This results in
significantly lower system EMI compared to the
typical narrow band signal produced by oscillators
and most clock generators. Lowering EMI by
increasing a signal’s bandwidth is called “spread
spectrum clock generation”.
The P18XX uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all-digital
method.
APPLICATIONS
The P18XX is targeted towards EMI management
for memory and LVDS interfaces in mobile
graphic
chipsets
and
high-speed
digital
applications such as PC peripheral devices,
consumer electronics, and embedded controller
systems.
May, 2002
Revision C
PulseCore – A Division of Alliance Semiconductor
3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054
Tel (408) 748-6988 • Fax (408) 748-0009
http://www.pulsecore.com
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