Data Sheet
FEATURES
5 kV RMS Quad-Channel Digital Isolators
ADuM4400/ADuM4401/ADuM4402
GENERAL DESCRIPTION
The ADuM440x
1
are 4-channel digital isolators based on the
Analog Devices, Inc.,
iCoupler®
technology. Combining high
speed CMOS and monolithic air core transformer technology,
these isolation components provide outstanding performance
characteristics that are superior to the alternatives, such as
optocoupler devices and other integrated couplers.
The ADuM440x isolators provide four independent isolation
channels in a variety of channel configurations and data rates
(see the Ordering Guide). All models operate with the supply
voltage on either side ranging from 3.0 V to 5.5 V, providing
compatibility with lower voltage systems as well as enabling a
voltage translation functionality across the isolation barrier.
The ADuM440x isolators have a patented refresh feature that
ensures dc correctness in the absence of input logic transitions
and during power-up/power-down conditions.
This family of isolators, like many Analog Devices isolators,
offers very low power consumption, consuming one-tenth to
one-sixth the power of comparable isolators at comparable data
rates up to 10 Mbps. All models of the ADuM440x provide low
pulse width distortion (<2 ns for C grade). In addition, every
model has an input glitch filter to protect against extraneous
noise disturbances.
The ADuM440x contain circuit and layout enhancements to help
achieve system-level IEC 61000-4-x compliance (ESD/burst/surge).
The precise capability in these tests for the ADuM440x are strongly
determined by the design and layout of the user’s board or module.
For more information, see the AN-793 Application Note,
ESD/Latch-Up Considerations with iCoupler Isolation Products.
1
Enhanced system-level ESD performance per IEC 61000-4-x
Safety and regulatory approvals
(RI-16 package)
UL recognition: 5000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
IEC 60601-1: 250 V rms (reinforced)
IEC 60950-1: 400 V rms (reinforced)
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
V
IORM
= 846 V peak
Low power operation
5 V operation
1.4 mA per channel maximum @ 0 Mbps to 2 Mbps
4.3 mA per channel maximum @ 10 Mbps
34 mA per channel maximum @ 90 Mbps
3.3 V operation
0.9 mA per channel maximum @ 0 Mbps to 2 Mbps
2.4 mA per channel maximum @ 10 Mbps
20 mA per channel maximum @ 90 Mbps
Bidirectional communication
3.3 V/5 V level translation
High temperature operation: 105°C
High data rate: dc to 90 Mbps (NRZ)
Precise timing characteristics
2 ns maximum pulse width distortion
2 ns maximum channel-to-channel matching
High common-mode transient immunity: >25 kV/µs
Output enable function
16-lead SOIC wide body package version (RW-16)
16-lead SOIC wide body enhanced creepage version (RI-16)
APPLICATIONS
General-purpose, high voltage, multichannel isolation
Medical equipment
Motor drives
Power supplies
Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329.
FUNCTIONAL BLOCK DIAGRAMS
V
DD1 1
GND
1 2
V
IA 3
V
IB 4
V
IC 5
V
ID 6
NC
7
GND
1 8
ENCODE
ENCODE
ENCODE
ENCODE
DECODE
DECODE
DECODE
DECODE
ADuM4400
16
15
14
13
12
11
10
9
V
DD2
GND
2
V
OA
V
OB
V
OC
V
OD
08157-001
V
DD1 1
GND
1 2
V
IA 3
V
IB 4
V
IC 5
V
OD 6
V
E1 7
GND
1 8
ENCODE
ENCODE
ENCODE
DECODE
ADuM4401
DECODE
DECODE
DECODE
ENCODE
16
15
14
13
12
11
10
9
V
DD2
GND
2
V
OA
V
OB
V
OC
V
ID
08157-002
V
DD1 1
GND
1 2
V
IA 3
V
IB 4
V
OC 5
V
OD 6
V
E1 7
GND
1 8
ENCODE
ENCODE
DECODE
DECODE
ADuM4402
DECODE
DECODE
ENCODE
ENCODE
16
15
14
13
12
11
10
9
V
DD2
GND
2
V
OA
V
OB
V
IC
V
ID
08157-003
V
E2
GND
2
V
E2
GND
2
V
E2
GND
2
Figure 1. ADuM4400
Figure 2. ADuM4401
Figure 3. ADuM4402
Rev. F
Document Feedback
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Technical Support
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no
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rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
ADuM4400/ADuM4401/ADuM4402
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—5 V Operation................................ 3
Electrical Characteristics—3.3 V Operation ............................ 4
Electrical Characteristics—Mixed 5 V/3.3 V Operation ........ 5
Electrical Characteristics—Mixed 3.3 V/5 V Operation ........ 6
Package Characteristics ............................................................... 7
Regulatory Information ............................................................... 7
Insulation and Safety-Related Specifications ............................ 8
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 9
Data Sheet
Recommended Operating Conditions .......................................9
Absolute Maximum Ratings ......................................................... 10
ESD Caution................................................................................ 10
Pin Configurations and Function Descriptions ......................... 11
Typical Performance Characteristics ........................................... 14
Applications Information .............................................................. 16
PC Board Layout ........................................................................ 16
System-Level ESD Considerations and Enhancements ........ 16
Propagation Delay-Related Parameters................................... 16
DC Correctness and Magnetic Field Immunity ..................... 16
Power Consumption .................................................................. 17
Insulation Lifetime ..................................................................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 20
REVISION HISTORY
7/2017—Rev. E to Rev. F
Change to Logic High Output Voltage Parameter and Logic low
Output Voltage Parameter; Table 3 ................................................ 3
Change to Logic High Output Voltage Parameter and Logic low
Output Voltage Parameter; Table 6 ................................................ 4
Change to Logic High Output Voltage Parameter and Logic low
Output Voltage Parameter; Table 9 ................................................ 5
Change to Logic High Output Voltage Parameter and Logic low
Output Voltage Parameter; Table 12 .............................................. 6
5/2017—Rev. D to Rev. E
Changes to Table 14 .......................................................................... 7
9/2016—Rev. C to Rev. D
Changed 3.0 V to 3.3 V and 2.7 V to 3.0 V ................ Throughout
Changes to Figure 8 to Figure 13 .................................................. 13
Changes to Figure 14 to Figure 16 ................................................ 14
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 19
2/2012—Rev. B to Rev. C
Created Hyperlink for Safety and Regulatory Approvals
Entry in Features Section................................................................. 1
Change to PC Board Layout Section ............................................ 15
10/2011—Rev. A to Rev. B
Added Logic Low Output Voltage, Table 3 ....................................3
Added Logic Low Output Voltage, Table 6 ....................................4
Added Logic Low Output Voltage, Table 9 ....................................5
Added Logic Low Output Voltage, Table 12 ..................................6
8/2011—Rev. 0 to Rev. A
Added 16-Lead SOIC_IC Package ................................... Universal
Changes to Features Section ............................................................1
Changes to Pulse Width Parameter, C Grade, Table 1 .................3
Changes to Pulse Width Parameter, C Grade, Table 4 .................4
Changes to Pulse Width Parameter, C Grade, Table 7 .................5
Changes to Pulse Width Parameter, C Grade, Table 10 ...............6
Changes to Table 14 and Table 15 ...................................................7
Deleted (Pending) Throughout .......................................................8
Changes to Endnote 1, Table 17 ......................................................8
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 19
4/2009—Revision 0: Initial Version
Rev. F | Page 2 of 21
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
ADuM4400/ADuM4401/ADuM4402
All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ V
DD1
≤ 5.5 V, 4.5 V ≤ V
DD2
≤ 5.5 V, and −40°C ≤ T
A
≤ 105°C, unless otherwise noted. Switching specifications
are tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted.
Table 1.
Parameter
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Symbol
A Grade
Min
Typ Max
1
100
40
B Grade
Min Typ Max
10
50
3
C Grade
Min Typ Max
90
32
2
Unit
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
Test Conditions
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Within PWD limit
Between any two units
t
PHL,
t
PLH
PWD
PW
t
PSK
t
PSKCD
t
PSKOD
50
65
11
20
32
5
18
27
0.5
3
1000
50
50
50
100
15
3
6
10 Mbps—B, C Grades
Min
Typ
Max
9.0
3.0
7.4
4.4
6.0
6.0
Min
2.0
Typ
11.6
5.5
10.6
6.5
7.5
7.5
11.1
10
2
5
Table 2.
Parameter
SUPPLY CURRENT
ADuM4400
ADuM4401
ADuM4402
Symbol
I
DD1
I
DD2
I
DD1
I
DD2
I
DD1
I
DD2
1 Mbps—A, B, C Grades
Min
Typ
Max
2.9
1.2
2.5
1.6
2.0
2.0
3.5
1.9
3.2
2.4
2.8
2.8
Symbol
V
IH
V
IL
V
OH
V
OL
90 Mbps—C Grade
Min
Typ
Max
72
19
59
32
51
51
Unit
V
V
V
V
V
V
V
µA
mA
mA
mA/Mbps
mA/Mbps
ns
kV/µs
8
8
ns
ns
Mbps
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
High/low-to-high impedance
High impedance-to-high/low
100
36
82
46
62
62
Unit
mA
mA
mA
mA
mA
mA
Test Conditions
Table 3. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltage
Logic Low Output Voltage
Max
Test Conditions
0.8
V
DDx
− 0.1
V
DDx
− 0.4
5.0
4.8
0.0
0.04
0.2
+0.01
0.57
0.23
0.20
0.05
2.5
35
6
6
1.2
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
1
I
I
I
DDI(Q)
I
DDO(Q)
I
DDI(D)
I
DDO(D)
t
R
/t
F
|CM|
t
PHZ
, t
PLH
t
PZH
, t
PZL
f
r
−10
0.1
0.1
0.4
+10
0.83
0.35
I
Ox
= −20 µA, V
Ix
= V
IxH
I
Ox
= −3.2 mA, V
Ix
= V
IxH
I
Ox
= 20 µA, V
Ix
= V
IxL
I
Ox
= 400 µA, V
Ix
= V
IxL
I
Ox
= 3.2 mA, V
Ix
= V
IxL
0 V ≤ V
Ix
≤ V
DDx
25
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD
. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. F | Page 3 of 21
ADuM4400/ADuM4401/ADuM4402
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
Data Sheet
All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.0 V ≤ V
DD1
≤ 3.6 V, 3.0 V ≤ V
DD2
≤ 3.6 V, and −40°C ≤ T
A
≤ 105°C, unless otherwise noted. Switching specifications are
tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted.
Table 4.
Parameter
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Symbol
A Grade
Min
Typ Max
1
100
40
B Grade
Min Typ Max
10
50
3
C Grade
Min Typ Max
90
45
2
Unit
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
Test Conditions
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Within PWD limit
Between any two units
t
PHL
, t
PLH
PWD
PW
t
PSK
t
PSKCD
t
PSKOD
50
75
11
20
38
5
20
34
0.5
3
1000
50
50
50
100
22
3
6
11.1
16
2
5
Table 5.
Parameter
SUPPLY CURRENT
ADuM4400
ADuM4401
ADuM4402
Symbol
I
DD1
I
DD2
I
DD1
I
DD2
I
DD1
I
DD2
1 Mbps—A, B, C Grades
Min
Typ
Max
1.6
0.7
1.4
0.9
1.2
1.2
2.1
1.2
1.9
1.5
1.7
1.7
10 Mbps—B, C Grades
Min
Typ
Max
4.8
1.8
0.1
2.5
3.3
3.3
7.1
2.3
5.6
3.3
4.4
4.4
90 Mbps—C Grade
Min
Typ
Max
37
11
31
17
24
24
54
15
44
24
39
39
Unit
mA
mA
mA
mA
mA
mA
Test Conditions
Table 6. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltage
Symbol
V
IH
V
IL
V
OH
Min
1.6
0.4
V
DDx
− 0.1
V
DDx
− 0.4
3.0
2.8
Typ
Max
Unit
V
V
V
V
Test Conditions
I
Ox
= −20 µA, V
Ix
= V
IxH
I
Ox
= −3.2 mA, V
Ix
= V
IxH
Logic Low Output Voltage
V
OL
0.0
0.04
0.2
−10
+0.01
0.31
0.19
0.10
0.03
3
35
6
6
1.2
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
1
I
I
I
DDI(Q)
I
DDO(Q)
I
DDI(D)
I
DDO(D)
t
R
/t
F
|CM|
t
PHZ
, t
PLH
t
PZH
, t
PZL
f
r
0.1
0.1
0.4
+10
0.49
0.27
V
V
V
µA
mA
mA
mA/Mbps
mA/Mbps
ns
kV/µs
I
Ox
= 20 µA, V
Ix
= V
IxL
I
Ox
= 400 µA, V
Ix
= V
IxL
I
Ox
= 3.2 mA, V
Ix
= V
IxL
0 V ≤ V
Ix
≤ V
DDx
25
8
8
ns
ns
Mbps
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
High/low-to-high impedance
High impedance-to-high/low
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD
. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. F | Page 4 of 21
Data Sheet
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V OPERATION
ADuM4400/ADuM4401/ADuM4402
All typical specifications are at T
A
= 25°C, V
DD1
= 5 V, V
DD2
= 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 4.5 V ≤ V
DD1
≤ 5.5 V, 3.0 V ≤ V
DD2
≤ 3.6 V, and −40°C ≤ T
A
≤ 105°C, unless otherwise noted. Switching specifications are
tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted.
Table 7.
Parameter
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Symbol
A Grade
Min
Typ Max
1
50
40
B Grade
Min Typ Max
10
50
3
C Grade
Min Typ Max
90
40
2
Unit
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
Test Conditions
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Within PWD limit
Between any two units
t
PHL
, t
PLH
PWD
PW
t
PSK
t
PSKCD
t
PSKOD
50
70
11
15
35
5
20
30
0.5
3
1000
50
50
50
100
22
3
6
11.1
14
2
5
Table 8.
Parameter
SUPPLY CURRENT
ADuM4400
ADuM4401
ADuM4402
Symbol
I
DD1
I
DD2
I
DD1
I
DD2
I
DD1
I
DD2
1 Mbps—A, B, C Grades
Min
Typ
Max
2.9
0.7
2.5
0.9
2.0
1.2
3.5
1.2
3.2
1.5
2.8
1.7
10 Mbps—B, C Grades
Min
Typ
Max
9.0
1.8
7.4
2.5
6.0
3.3
11.6
2.3
10.6
3.3
7.5
4.4
90 Mbps—C Grade
Min
Typ
Max
72
11
59
17
46
24
100
15
82
24
62
39
Unit
mA
mA
mA
mA
mA
mA
Test Conditions
Table 9. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltage
Logic Low Output Voltage
Symbol
V
IH
V
IL
V
OH
V
OL
Min
2.0
0.8
V
DDx
− 0.1
V
DDx
− 0.4
3.0
2.8
0.0
0.04
0.2
+0.01
0.57
0.29
0.20
0.03
3
35
6
6
1.2
8
8
Typ
Max
Unit
V
V
V
V
V
V
V
µA
mA
mA
mA/Mbps
mA/Mbps
ns
kV/µs
ns
ns
Mbps
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
High/low-to-high impedance
High impedance-to-high/low
Test Conditions
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
1
Output Disable Propagation Delay
Output Enable Propagation Delay
Refresh Rate
1
I
I
I
DDI(Q)
I
DDO(Q)
I
DDI(D)
I
DDO(D)
t
R
/t
F
|CM|
t
PHZ
, t
PLH
t
PZH
, t
PZL
f
r
−10
0.1
0.1
0.4
+10
0.83
0.27
I
Ox
= −20 µA, V
Ix
= V
IxH
I
Ox
= −3.2 mA, V
Ix
= V
IxH
I
Ox
= 20 µA, V
Ix
= V
IxL
I
Ox
= 400 µA, V
Ix
= V
IxL
I
Ox
= 3.2 mA, V
Ix
= V
IxL
0 V ≤ V
Ix
≤ V
DDx
25
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD
. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. F | Page 5 of 21
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