Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
LF155, LF156, LF256, LF257
LF355, LF356, LF357
SNOSBH0D – MAY 2000 – REVISED NOVEMBER 2015
LFx5x JFET Input Operational Amplifiers
1 Features
1
2 Applications
•
•
•
•
•
•
•
Precision High-Speed Integrators
Fast D/A and A/D Converters
High Impedance Buffers
Wideband, Low Noise, Low Drift Amplifiers
Logarithmic Amplifiers
Photocell Amplifiers
Sample and Hold Circuits
•
•
•
Advantages
– Replace Expensive Hybrid and Module FET
Op Amps
– Rugged JFETs Allow Blow-Out Free Handling
Compared With MOSFET Input Devices
– Excellent for Low Noise Applications Using
Either High or Low Source Impedance—Very
Low 1/f Corner
– Offset Adjust Does Not Degrade Drift or
Common-Mode Rejection as in Most
Monolithic Amplifiers
– New Output Stage Allows Use of Large
Capacitive Loads (5,000 pF) Without Stability
Problems
– Internal Compensation and Large Differential
Input Voltage Capability
Common Features
– Low Input Bias Current: 30 pA
– Low Input Offset Current: 3 pA
– High Input Impedance: 10
12
Ω
– Low Input Noise Current: 0.01 pA/√Hz
– High Common-Mode Rejection Ratio: 100 dB
– Large DC Voltage Gain: 106 dB
Uncommon Features
– Extremely Fast Settling Time to 0.01%:
– 4
μs
for the LFx55 devices
– 1.5
μs
for the LFx56
– 1.5
μs
for the LFx57 (A
V
= 5)
– Fast Slew Rate:
– 5 V/µs for the LFx55
– 12 V/µs for the LFx56
– 50 V/µs for the LFx57 (A
V
= 5)
– Wide Gain Bandwidth:
– 2.5 MHz for the LFx55 devices
– 5 MHz for the LFx56
– 20 MHz for the LFx57 (A
V
= 5)
– Low Input Noise Voltage:
– 20 nV/√Hz for the LFx55
– 12 nV/√Hz for the LFx56
– 12 nV/√Hz for the LFx57 (A
V
= 5)
3 Description
The LFx5x devices are the first monolithic JFET input
operational amplifiers to incorporate well-matched,
high-voltage JFETs on the same chip with standard
bipolar transistors (BI-FET™ Technology). These
amplifiers feature low input bias and offset
currents/low offset voltage and offset voltage drift,
coupled with offset adjust, which does not degrade
drift or common-mode rejection. The devices are also
designed for high slew rate, wide bandwidth,
extremely fast settling time, low voltage and current
noise and a low 1/f noise corner.
Device Information
(1)
PART NUMBER
LFx5x
PACKAGE
SOIC (8)
TO-CAN (8)
PDIP (8)
BODY SIZE (NOM)
4.90 mm × 3.91 mm
9.08 mm × 9.08 mm
9.81 mm × 6.35 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
3 pF in LF357 series
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LF155, LF156, LF256, LF257
LF355, LF356, LF357
SNOSBH0D – MAY 2000 – REVISED NOVEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
Features
..................................................................
Applications
...........................................................
Description
.............................................................
Revision History.....................................................
Pin Configuration and Functions
.........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
AC Electrical Characteristics, T
A
= T
J
= 25°C, V
S
=
±15 V..........................................................................
DC Electrical Characteristics, T
A
= T
J
= 25°C, V
S
=
±15 V..........................................................................
DC Electrical Characteristics ....................................
Power Dissipation Ratings ........................................
Typical Characteristics ..............................................
1
1
1
2
3
4
4
4
4
5
5
6
6
7
8
7.2 Functional Block Diagram .......................................
15
7.3 Feature Description.................................................
16
7.4 Device Functional Modes........................................
16
8
Application and Implementation
........................
17
8.1 Application Information............................................
17
8.2 Typical Application ..................................................
18
8.3 System Examples ...................................................
20
9 Power Supply Recommendations......................
33
10 Layout...................................................................
33
10.1 Layout Guidelines .................................................
33
10.2 Layout Example ....................................................
34
11 Device and Documentation Support
.................
35
11.1
11.2
11.3
11.4
11.5
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
35
35
35
35
35
7
Detailed Description
............................................
14
7.1 Overview .................................................................
14
12 Mechanical, Packaging, and Orderable
Information
...........................................................
35
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (March 2013) to Revision D
•
Page
Added
Pin Configuration and Functions
section,
ESD Ratings
table,
Thermal Information
table,
Feature Description
section,
Device Functional Modes, Application and Implementation
section,
Power Supply Recommendations
section,
Layout
section,
Device and Documentation Support
section, and
Mechanical, Packaging, and Orderable
Information
section ................................................................................................................................................................
1
Removed T
HIGH
parameter as it is redundant to T
A
maximum ...............................................................................................
4
Page
•
Changes from Revision B (March 2013) to Revision C
•
Changed layout of National Data Sheet to TI format ...........................................................................................................
31
2
Submit Documentation Feedback
LF156 LF256 LF356
Copyright © 2000–2015, Texas Instruments Incorporated
LF155, LF156, LF256, LF257
LF355, LF356, LF357
www.ti.com
SNOSBH0D – MAY 2000 – REVISED NOVEMBER 2015
5 Pin Configuration and Functions
LMC Package
8-Pin TO-99
Top View
D or P Package
8-Pin SOIC or PDIP
Top View
Available per JM38510/11401 or
JM38510/11402
Pin Functions
PIN
NAME
BALANCE
+INPUT
–INPUT
NC
OUTPUT
V+
V–
NO.
1, 5
3
2
8
6
7
4
I/O
I
I
I
—
O
—
—
Balance for input offset voltage
Noninverting input
Inverting input
No connection
Output
Positive power supply
Negative power supply
DESCRIPTION
Copyright © 2000–2015, Texas Instruments Incorporated
Submit Documentation Feedback
LF156 LF256 LF356
3
LF155, LF156, LF256, LF257
LF355, LF356, LF357
SNOSBH0D – MAY 2000 – REVISED NOVEMBER 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
LF155x, LF256x, LF356B
LF35x
LF15x, LF25x, LF356B
LF35x
LF15x, LF25x, LF356B
LF35x
LF15x
LF25x, LF356B, LF35x
LF25x, LF356B, LF35x
LF25x, LF356B, LF35x
(1) (2) (3)
MIN
Supply voltage
Differential input voltage
Input voltage
(4)
Output short circuit duration
LMC package
T
JMAX
P package
D package
Soldering
information
(lead temp.)
TO-99 package
PDIP package
SOIC package
Storage temperature, T
stg
(1)
(2)
(3)
(4)
Soldering (10 sec.)
Soldering (10 sec.)
Vapor phase (60 sec.)
Infrared (15 sec.)
LF25x, LF356B, LF35x
LF25x, LF356B, LF35x
−65
MAX
±22
±18
±40
±30
±20
±16
UNIT
V
V
V
—
Continuous
150
115
100
100
300
260
215
220
150
°C
°C
°C
Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended
Operating Conditions.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by T
JMAX
,
θ
JA
, and the
ambient temperature, T
A
. The maximum available power dissipation at any temperature is P
D
= (T
JMAX
−
T
A
) /
θ
JA
or the 25°C P
dMAX
,
whichever is less.
If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.
Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
6.2 ESD Ratings
VALUE
V
(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1) (2)
UNIT
V
±1000
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
100 pF discharged through 1.5-kΩ resistor
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
LF15x
Supply voltage, V
S
LF25x
LF356B
LF35x
LF15x
T
A
LF25x
LF356B
LF35x
–55
–25
0
0
T
A
T
A
T
A
T
A
±15
±15
±15
NOM
V
S
V
S
V
S
MAX
±20
±20
±20
±15
125
85
70
70
°C
V
UNIT
4
Submit Documentation Feedback
LF156 LF256 LF356
Copyright © 2000–2015, Texas Instruments Incorporated
LF155, LF156, LF256, LF257
LF355, LF356, LF357
www.ti.com
SNOSBH0D – MAY 2000 – REVISED NOVEMBER 2015
6.4 Thermal Information
LF155, LF156, LF355, LF357
THERMAL METRIC
(1)
P (PDIP)
8 PINS
Junction-to-ambient thermal resistance
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
(1)
Still Air
400 LF/Min Air Flow
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
130
—
—
—
—
—
—
D
(SOIC)
8 PINS
195
—
—
—
—
—
—
LMC (TO-99)
8 PINS
—
160
65
23
—
—
—
LF356
P (PDIP)
8 PINS
55.2
—
—
44.5
32.4
21.7
32.3
°C/W
°C/W
°C/W
°C/W
°C/W
UNIT
For more information about traditional and new thermal metrics, see the
Semiconductor and IC Package Thermal Metrics
application
report,
SPRA953.
6.5 AC Electrical Characteristics, T
A
= T
J
= 25°C, V
S
= ±15 V
PARAMETER
LF15x: A
V
= 1
LF357: A
V
= 5
LFx55
GBW
Gain Bandwidth
Product
LFx56, LF356B
LFx57
LFx55
t
s
Settling Time to
0.01%
(1)
LFx56, LF356B
LFx57
LFx55
f = 100 Hz
e
n
Equivalent Input
Noise Voltage
R
S
= 100
Ω
f = 1000 Hz
LFx56, LF356B
LFx57
LFx55
LFx56, LF356B
LFx57
LFx55
f = 100 Hz
i
n
Equivalent Input
Current Noise
f = 1000 Hz
LFx55
C
IN
Input
Capacitance
LFx56, LF356B
LFx57
(1)
Settling time is defined here, for a unity gain inverter connection using 2-kΩ resistors for the LF15x. It is the time required for the error
voltage (the voltage at the inverting input pin on the amplifier) to settle to within 0.01% of its final value from the time a 10-V step input is
applied to the inverter. For the LF357, A
V
=
−5,
the feedback resistor from output to input is 2 kΩ and the output step is 10 V (See
Settling Time Test Circuit).
3
pF
LFx56, LF356B
LFx57
LFx55
LFx56, LF356B
LFx57
0.01
pA/√Hz
0.01
pA/√Hz
TEST CONDITIONS
LFx55
SR
Slew Rate
LFx56, LF356B
LFx56, LF356B
LFx57
7.5
12
50
2.5
5
20
4
1.5
1.5
25
15
15
20
12
12
nV/√Hz
nV/√Hz
μs
MHz
MIN
TYP
5
V/μs
MAX
UNIT
Copyright © 2000–2015, Texas Instruments Incorporated
Submit Documentation Feedback
LF156 LF256 LF356
5