MOSEL VITELIC
V61C31161024
64K x 16 HIGH SPEED
STATIC RAM
PRELIMINARY
INFORMATION
Features
s
s
s
s
s
High-speed: 10, 12, 15 ns
All inputs and outputs directly TTL compatible
Three state outputs
Single 3.3V
±
10% Power Supply
Packages
– 44-pin TSOP (Standard)
– 44-pin 400 mil SOJ
s
Low Power Consumption
– Active: 140mA
– Standby: 2mA (CMOS)
Description
The V61C31161024 is a 1,048,576-bit static
random-access memory organized as 65,536
words by 16 bits. Inputs and three-state outputs are
TTL compatible and allow for direct interfacing with
common system bus structures.
Functional Block Diagram
A
1
Row
Decoder
Memory Array
V
CC
GND
A
7
A
8
A
9
I/O
0
Input
Data
Circuit
I/O
15
A
0
UBE
LBE
OE
WE
CE
Column I/O
Column Decoder
A
10
A
15
Control
Circuit
6131161024-01
Device Usage Chart
Operating
Temperature
Range
0
°
C to 70
°
C
Package Outline
T
•
K
•
10
•
Access Time (ns)
12
•
15
•
Temperature
Mark
Blank
V61C31161024 Rev. 0.5 August 1999
1
MOSEL VITELIC
Pin Descriptions
A
0
–A
15
Address Inputs
These 16 address inputs select one of the 64K x 16
bit segments in the RAM.
CE
Chip Enable Input
CE is active LOW. It must be active to read from or
write to the device. If chip enable is not active, the
device is deselected and is in a standby power
mode. The I/O pins will be in the high-impedance
state when deselected.
OE
Output Enable Input
The output enable input is active LOW. When OE
is Low with CE Low and WE High, data will be pre-
sented on the I/O pins. The I/O pins will be in the
high impedance state when OE is High.
V61C31161024
UBE, LEB Byte Enable
Active low inputs. These inputs are used to enable
the upper or lower data byte.
WE
Write Enable Input
The write enable input is active LOW and controls
read and write operations. With the chip enabled,
when WE is HIGH and OE is LOW, output data will
be present at the I/O pins; when WE is LOW and
OE is HIGH, the data present on the I/O pins will be
written into the selected memory locations.
I/O
0
–I/O
15
Data Input and Data Output Ports
These 16 bidirectional ports are used to read data
from and write data into the RAM.
V
CC
GND
Power Supply
Ground
Pin Configurations (Top View)
44-Pin SOJ
A
4
A
3
A
2
A
1
A
0
CE
I/O
0
I/O
1
I/O
2
I/O
3
V
CC
GND
I/O
4
I/O
5
I/O
6
I/O
7
WE
A
15
A
14
A
13
A
12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
6131161024-02
44-Pin TSOP-II (Standard)
A
5
A
6
A
7
OE
UBE
LBE
I/O
15
I/O
14
I/O
13
I/O
12
GND
V
CC
I/O
11
I/O
10
I/O
9
I/O
8
NC
A
8
A
9
A
10
A
11
NC
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
VCC
GND
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
A12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
6131161024-03
A5
A6
A7
OE
UBE
LBE
I/O15
I/O14
I/O13
I/O12
GND
VCC
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
V61C31161024 Rev. 0.5 August 1999
2
MOSEL VITELIC
Part Number Information
V
MOSEL-VITELIC
SRAM
FAMILY
61 = HIGH SPEED
C = CMOS PROCESS
31 = 3.3V
ORGANIZATION
16 = 16-bit
BLANK = STANDARD POWER
10 ns
12 ns
15 ns
OPERATING
VOLTAGE
DENSITY
1024K
PWR.
SPEED
PKG
V61C31161024
61
C
31
16
1024
–
TEMP.
BLANK = 0°C to 70°C
T = TSOP STANDARD
K = 400 mil SOJ
6131161024-04
Absolute Maximum Ratings
(1)
Symbol
V
IN
P
T
T
BIAS
T
STG
Parameter
Input Voltage
Power Dissipation
Temperature Under Bias
Storage Temperature
Commercial
-0.5 to V
CC
+0.5
1.0
-10 to +85
-65 to +150
Units
V
W
°
C
°
C
NOTE:
1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Capacitance*
T
A
= 25
°
C, f = 1.0MHz
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
I/O
= 0V
Max.
6
8
Unit
pF
pF
NOTE:
1. This parameter is guaranteed and not tested.
Truth Table
Mode
Standby
Output Disable
Output Disable
Read
Read
Read
Write
Write
Write
CE
H
L
L
L
L
L
L
L
L
OE
X
X
H
L
L
L
X
X
X
WE
X
X
H
H
H
H
L
L
L
UBE
X
H
X
L
L
H
L
L
H
LBE
X
H
X
L
H
L
L
H
L
I/O
8-15
Operation
High Z
High Z
High Z
D
OUT
D
OUT
High Z
D
IN
D
IN
High Z
I/O
0-7
Operation
High Z
High Z
High Z
D
OUT
High Z
D
OUT
D
IN
High Z
D
IN
NOTE:
X = Don’t Care, L = LOW, H = HIGH
V61C31161024 Rev. 0.5 August 1999
3
MOSEL VITELIC
DC Electrical Characteristics
(over all temperature ranges, V
CC
= 3.3V
±
10%)
-10
Symbol
I
IL
I
OL
I
CC
ISB
Parameter
Input Leakage Current
Output Leakage Current
Test Conditions
V
CC
= MAX, V
IN
= GND to V
CC
CE = V
IH
, V
CC
= Max,
V
OUT
= GND to V
CC
CE = V
IL
, I
OUT
= 0, f = f
max
CE = V
IH
, f = f
max
CE
≥
V
CC
– 0.2V, f = 0, V
IN
≤
0.2V
or V
IN
> V
CC
– 0.2V
Min.
—
—
Max.
5
5
Min.
—
—
-12
Max.
5
5
V61C31161024
-15
Min.
—
—
Max.
5
5
Units
µ
A
µ
A
mA
Operating Power Supply
Current
Standby Power Supply
Current (TTL Level)
Standby Power Supply
Current (CMOS Level)
Input Low Voltage
(1,2)
Input High Voltage
(1)
Output Low Voltage
Output High Voltage
—
140
—
130
—
120
—
25
—
20
—
20
mA
I
SB1
V
IL
V
IH
V
OL
V
OH
—
2
—
2
—
2
mA
-0.3
2.2
I
OL
= 4mA
I
OH
= -2mA
—
2.4
0.8
V
CC
+ 0.3
0.4
—
-0.3
2.2
—
2.4
0.8
V
CC
+ 0.3
0.4
—
-0.3
0.8
V
V
V
V
2.2 V
CC
+ 0.3
—
2.4
0.4
—
NOTES:
1. These are absolute values with respect to device ground and all overshoots due to system or tester noise are included.
2. V
IL
(Min.) = -3.0V for pulse width < 20ns.
3. f
MAX
= 1/t
RC
.
4. Maximum values.
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Timing Reference Levels
Output Load
0 to 3V
3 ns
1.5V
AC Test Loads and Waveforms
+3.3V
480
Ω
I/O Pins
see below
255
Ω
C
L
= 30 pF*
Key to Switching Waveforms
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
OUTPUTS
WILL BE
STEADY
WILL BE
CHANGING
FROM H TO L
WILL BE
CHANGING
FROM L TO H
CHANGING:
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
“OFF” STATE
+3.3V
480
Ω
I/O Pins
255
Ω
C
L
= 5pF*
MAY CHANGE
FROM L TO H
for t
CLZ
, t
CHZ
, t
OLZ
, t
WHZ
, t
OW
, and t
OHZ
* Includes scope and jig capacitance
6131161024-05
DON'T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
V61C31161024 Rev. 0.5 August 1999
4
MOSEL VITELIC
AC Electrical Characteristics
(over all temperature ranges)
Read Cycle
-10
Parameter
Name
t
RC
t
AA
t
ACS
t
BA
t
OE
t
CLZ
t
BLZ
t
OLZ
t
CHZ
t
OHZ
t
BHZ
t
OH
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
UBE, LBE Access Time
Output Enable to Output Valid
Chip Enable to Output in Low Z
UBE, LBE to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
UBE, LBE to Output in High Z
Output Hold from Address Change
Min.
10
—
—
—
—
2
0
0
0
0
0
2
Max.
—
10
10
5
5
—
—
—
5
5
5
—
Min.
12
—
—
—
—
3
0
0
0
0
0
3
-12
Max.
—
12
12
6
6
—
—
—
6
6
6
—
V61C31161024
-15
Min.
15
—
—
—
—
3
0
0
0
0
0
3
Max.
—
15
15
7
7
—
—
—
7
7
7
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Cycle
-10
Parameter
Name
t
WC
t
CW
t
AS
t
AW
t
WP
t
AH
t
WHZ
t
WLZ
t
DW
t
DH
t
BW
Parameter
Write Cycle Time
Chip Enable to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width
Address Hold from End of Write
Write to Output High-Z
Write to Output Low Z
Data Setup to End of Write
Data Hold from End of Write
UBE, LBE to End of Write
Min.
10
7
0
7
7
0
0
3
5
0
7
Max.
—
—
—
—
—
—
5
—
—
—
—
Min.
12
8
0
8
8
0
0
3
6
0
8
-12
Max.
—
—
—
—
—
—
6
—
—
—
—
Min.
15
10
0
10
10
0
0
5
7
0
10
-15
Max.
—
—
—
—
—
—
7
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V61C31161024 Rev. 0.5 August 1999
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
