19-0528; Rev 0; 5/06
KIT
ATION
EVALU
BLE
AVAILA
10-Bit, 22Msps, Full-Duplex
Analog Front-End
General Description
Features
♦
Dual 10-Bit, 22Msps Rx ADC and Dual 10-Bit,
22Msps Tx DAC
♦
Ultra-Low Power
50.4mW at f
CLK
= 22MHz, FD Mode
39.9mW at f
CLK
= 22MHz, Slow Rx Mode
33.9mW at f
CLK
= 22MHz, Slow Tx Mode
Low-Current Standby and Shutdown Modes
♦
Programmable Tx DAC Common-Mode DC Level
and I/Q Offset Trim
♦
Excellent Dynamic Performance
SNR = 54.8dB at f
IN
= 5.5MHz (Rx ADC)
SFDR = 72.9dBc at f
OUT
= 2.2MHz (Tx DAC)
♦
Three 12-Bit, 1μs Aux-DACs
♦
10-Bit, 333ksps Aux-ADC with 4:1 Input Mux and
Data Averaging
♦
Excellent Gain/Phase Match
±0.01° Phase, ±0.01dB Gain (Rx ADC) at
f
IN
= 5.5MHz
♦
Multiplexed Parallel Digital I/O
♦
Serial-Interface Control
♦
Versatile Power-Control Circuits
Shutdown, Standby, Idle, Tx/Rx Disable
♦
Miniature 56-Pin Thin QFN Package
(7mm x 7mm x 0.8mm)
MAX19712
The MAX19712 is an ultra-low-power, highly integrated
mixed-signal analog front-end (AFE) ideal for wideband
communication applications operating in full-duplex
(FD) mode. Optimized for high dynamic performance
and ultra-low power, the device integrates a dual 10-bit,
22Msps receive (Rx) ADC; dual 10-bit, 22Msps transmit
(Tx) DAC; three fast-settling 12-bit aux-DAC channels
for ancillary RF front-end control; and a 10-bit, 333ksps
housekeeping aux-ADC. The typical operating power in
FD mode is 50.4mW at a 22MHz clock frequency.
The Rx ADCs feature 54.7dB SINAD and 75.6dBc SFDR
at 5.5MHz input frequency with a 22MHz clock frequen-
cy. The analog I/Q input amplifiers are fully differential
and accept 1.024V
P-P
full-scale signals. Typical I/Q
channel matching is ±0.01° phase and ±0.01dB gain.
The Tx DACs feature 72.9dBc SFDR at f
OUT
= 2.2MHz
and f
CLK
= 22MHz. The analog I-Q full-scale output volt-
age range is ±400mV differential. The output DC com-
mon-mode voltage is from 0.89V to 1.36V. The I/Q
channel offset is adjustable to optimize radio lineup side-
band/carrier suppression. Typical I-Q channel matching
is ±0.01dB gain and ±0.1° phase.
Two independent 10-bit parallel, high-speed digital
buses used by the Rx ADC and Tx DAC allow full-
duplex operation for frequency-division duplex applica-
tions. The Rx ADC and Tx DAC can be disabled
independently to optimize power management. A 3-wire
serial interface controls power-management modes, the
aux-DAC channels, and the aux-ADC channels.
The MAX19712 operates on a single 2.7V to 3.3V analog
supply and 1.8V to 3.3V digital I/O supply. The
MAX19712 is specified for the extended (-40°C to
+85°C) temperature range and is available in a 56-pin,
thin QFN package. The
Selector Guide
at the end of the
data sheet lists other pin-compatible versions in this AFE
family. For time-division duplex (TDD) applications, refer
to the MAX19705–MAX19708 AFE family of products.
Pin Configuration
CS/WAKE
TOP VIEW
ADC2
GND
V
DD
V
DD
DOUT
SCLK
DA9
DA8
DA7
DA6
DA5
42 41 40 39 38 37 36 35 34 33 32 31 30 29
ADC1 43
DAC3 44
DAC2 45
DAC1 46
V
DD
47
IDN 48
IDP 49
GND 50
V
DD
51
28 DA3
27 DA2
26 DA1
25 DA0
24 OV
DD
23 OGND
22 AD9
Applications
WCDMA Handsets
801.11a/b/g WLAN
RFID Readers
VoIP Terminals
Portable Communication
Equipment
MAX19712
DA4
21 AD8
20 AD7
19 AD6
18 AD5
17 AD4
16 AD3
15 AD2
QDN 52
QDP 53
REFIN 54
COM 55
EXPOSED PADDLE (GND)
Ordering Information
PART*
MAX19712ETN
MAX19712ETN+
PIN-PACKAGE
56 Thin QFN-EP**
56 Thin QFN-EP**
PKG CODE
T5677-1
T5677-1
REFN 56
1
2
3
4
5
6
7
8
9
10 11 12 13 14
REFP
V
DD
DIN
V
DD
GND
CLK
GND
V
DD
IAP
IAN
GND
AD0
QAN
THIN QFN
NOTE:
THE PIN 1 INDICATOR IS “+” FOR LEAD-FREE DEVICES.
*All
devices are specified over the -40°C to +85°C operating range.
**EP
= Exposed paddle.
+Denotes
lead-free package.
Functional Diagram and Selector Guide appear at end of
data sheet.
________________________________________________________________
Maxim Integrated Products
QAP
AD1
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
10-Bit, 22Msps, Full-Duplex
Analog Front-End
MAX19712
ABSOLUTE MAXIMUM RATINGS
VDD to GND, OVDD to OGND ..............................-0.3V to +3.6V
GND to OGND.......................................................-0.3V to +0.3V
IAP, IAN, QAP, QAN, IDP, IDN, QDP,
QDN, DAC1, DAC2, DAC3 to GND .....................-0.3V to VDD
ADC1, ADC2 to GND.................................-0.3V to (VDD + 0.3V)
REFP, REFN, REFIN, COM to GND ...........-0.3V to (VDD + 0.3V)
AD0–AD9, DA0–DA9, SCLK, DIN,
CS/WAKE,
CLK, DOUT to OGND .........................-0.3V to (OVDD + 0.3V)
Continuous Power Dissipation (TA = +70°C)
56-Pin Thin QFN-EP (derate 27.8mW/°C above +70°C) 2.22W
Thermal Resistance
θ
JA ..................................................36°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 22MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output,
C
REFP
= C
REFN
= C
COM
= 0.33µF, C
L
< 5pF on all aux-DAC outputs, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are
at T
A
= +25°C.) (Note 1)
PARAMETER
POWER REQUIREMENTS
Analog Supply Voltage
Output Supply Voltage
V
DD
OV
DD
FD mode: f
CLK
= 22MHz, f
OUT
= 2.2MHz
on both DAC channels; f
IN
= 5.5MHz on
both ADC channels; aux-DACs ON and at
midscale, aux-ADC ON
FD mode: f
CLK
= 15.36MHz, f
OUT
=
2.2MHz on both DAC channels; f
IN
=
5.5MHz on both ADC channels; aux-DACs
ON and at midscale, aux-ADC ON
SPI2-Tx mode: f
CLK
= 22MHz, f
OUT
=
2.2MHz on both DAC channels; Rx ADC
OFF; aux-DACs ON and at midscale,
aux-ADC ON
SPI1-Rx mode: f
CLK
= 22MHz, f
IN
=
5.5MHz on both ADC channels; Tx DAC
OFF (Tx DAC outputs at 0V); aux-DACs
ON and at midscale, aux-ADC ON
SPI4-Tx mode: f
CLK
= 22MHz, f
OUT
=
2.2MHz on both DAC channels; Rx ADC
ON (output tri-stated); aux-DACs ON and
at midscale, aux-ADC ON
2.7
1.8
3.0
3.3
V
DD
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
16.8
19
13.4
V
DD
Supply Current
11.3
13
mA
13.3
16
16.4
19
2
_______________________________________________________________________________________
10-Bit, 22Msps, Full-Duplex
Analog Front-End
MAX19712
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 22MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output,
C
REFP
= C
REFN
= C
COM
= 0.33µF, C
L
< 5pF on all aux-DAC outputs, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are
at T
A
= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
SPI3-Rx mode: f
CLK
= 22MHz, f
IN
=
5.5MHz on both channels; Tx DAC ON (Tx
DAC outputs at midscale); aux-DACs ON
and at midscale, aux-ADC ON
Standby mode: CLK = 0 or OV
DD
;
aux-DACs ON and at midscale,
aux-ADC ON
Idle mode: f
CLK
= 22MHz; aux-DACs ON
and at midscale, aux-ADC ON
Shutdown mode: CLK = 0 or OV
DD
,
or aux-ADC OFF
FD mode: f
CLK
= 22MHz, f
OUT
= 2.2MHz
on both DAC channels; f
IN
= 5.5MHz on
both ADC channels; aux-DACs ON and at
midscale, aux-ADC ON
SPI1-Rx and SPI3-Rx modes: f
CLK
=
22MHz, f
IN
= 5.5MHz on both ADC
channels; DAC input bus tri-stated; aux-
DACs ON and at midscale, aux-ADC ON
OV
DD
Supply Current
SPI2-Tx and SPI4-Tx modes: f
CLK
=
22MHz, f
OUT
= 2.2MHz on both DAC
channels; ADC output bus tri-stated; aux-
DACs ON and at midscale, aux-ADC ON
Standby mode: CLK = 0 or OV
DD
; aux-
DACs ON and at midscale, aux-ADC ON
Idle mode: f
CLK
= 22MHz; aux-DACs ON
and at midscale, aux-ADC ON
Shutdown mode: CLK = 0 or OV
DD
,
or aux-ADC OFF
Rx ADC DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
DC Gain Matching
Offset Matching
N
INL
DNL
Residual DC offset error
Includes reference error
-5
-5
-0.15
10
±0.6
±0.45
±0.13
±0.8
±0.04
±9
+5
+5
+0.15
Bits
LSB
LSB
%FS
%FS
dB
LSB
MIN
TYP
MAX
UNITS
15.8
19
mA
2.7
4
V
DD
Supply Current
7.8
0.5
10
5
µA
2.3
mA
2.2
160
0.1
37
0.1
µA
_______________________________________________________________________________________
3
10-Bit, 22Msps, Full-Duplex
Analog Front-End
MAX19712
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 22MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output,
C
REFP
= C
REFN
= C
COM
= 0.33µF, C
L
< 5pF on all aux-DAC outputs, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are
at T
A
= +25°C.) (Note 1)
PARAMETER
Gain Temperature Coefficient
Power-Supply Rejection
Rx ADC ANALOG INPUT
Input Differential Range
Input Common-Mode Voltage
Range
Input Impedance
Rx ADC CONVERSION RATE
Maximum Clock Frequency
Data Latency
Rx ADC DYNAMIC CHARACTERISTICS (Note 3)
Signal-to-Noise Ratio
Signal-to-Noise and Distortion
Spurious-Free Dynamic Range
Total Harmonic Distortion
Third-Harmonic Distortion
Intermodulation Distortion
Third-Order Intermodulation
Distortion
Aperture Delay
Aperture Jitter
Overdrive Recovery Time
Rx ADC INTERCHANNEL CHARACTERISTICS
Crosstalk Rejection
Amplitude Matching
Phase Matching
f
INX,Y
= 5.5MHz, A
INX,Y
= -0.5dBFS,
f
INY,X
= 1MHz, A
INY,X
= -0.5dBFS (Note 4)
f
IN
= 5.5MHz, A
IN
= -0.5dBFS (Note 5)
f
IN
= 5.5MHz, A
IN
= -0.5dBFS (Note 5)
-91
±0.01
±0.01
dB
dB
Degrees
1.5x full-scale input
SNR
SINAD
SFDR
THD
HD3
IMD
IM3
f
IN
= 5.5MHz
f
IN
= 12.5MHz
f
IN
= 5.5MHz
f
IN
= 12.5MHz
f
IN
= 5.5MHz
f
IN
= 12.5MHz
f
IN
= 5.5MHz
f
IN
= 12.5MHz
f
IN
= 5.5MHz
f
IN
= 12.5MHz
f
IN1
= 1MHz, A
IN1
= -7dBFS;
f
IN2
= 1.8MHz, A
IN2
= -7dBFS
f
IN1
= 1MHz, A
IN1
= -7dBFS;
f
IN2
= 1.8MHz, A
IN2
= -7dBFS
65.9
52.9
53
54.8
54.7
54.7
54.6
75.6
76.3
-72.8
-71.3
-78.9
-76.7
-71
-78
3.5
2
2
-64.3
dB
dB
dBc
dBc
dBc
dBc
dBc
ns
ps
RMS
ns
f
CLK
(Note 2)
Channel IA
Channel QA
5
5.5
22
MHz
Clock
Cycles
V
ID
V
CM
R
IN
C
IN
Switched capacitor load
Differential or single-ended inputs
±0.512
V
DD
/ 2
245
5
V
V
kΩ
pF
PSRR
Offset (V
DD
±5%)
Gain (V
DD
±5%)
SYMBOL
CONDITIONS
MIN
TYP
±30
±0.1
±0.05
MAX
UNITS
ppm/°C
LSB
4
_______________________________________________________________________________________
10-Bit, 22Msps, Full-Duplex
Analog Front-End
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3V, OV
DD
= 1.8V, internal reference (1.024V), C
L
≈
10pF on all digital outputs, f
CLK
= 22MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, CM1 = 0, CM0 = 0, differential Rx ADC input, differential Tx DAC output,
C
REFP
= C
REFN
= C
COM
= 0.33µF, C
L
< 5pF on all aux-DAC outputs, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are
at T
A
= +25°C.) (Note 1)
PARAMETER
Tx DAC DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Residual DC Offset
Full-Scale Gain Error
Tx DAC DYNAMIC PERFORMANCE
DAC Conversion Rate
In-Band Noise Density
Third-Order Intermodulation
Distortion
Glitch Impulse
Spurious-Free Dynamic Range to
Nyquist
Total Harmonic Distortion to
Nyquist
Signal-to-Noise Ratio to Nyquist
I-to-Q Output Isolation
Gain Mismatch Between I and Q
Channels
Phase Mismatch Between I and Q
Channels
Differential Output Impedance
Tx DAC ANALOG OUTPUT
Full-Scale Output Voltage
V
FS
Bits CM1 = 0, CM0 = 0 (default)
Output Common-Mode Voltage
V
COMD
Bits CM1 = 0, CM0 = 1
Bits CM1 = 1, CM0 = 0
Bits CM1 = 1, CM0 = 1
Rx ADC–Tx DAC INTERCHANNEL CHARACTERISTICS
Receive Transmit Isolation
AUXILIARY ADCs (ADC1, ADC2)
Resolution
Full-Scale Reference
ADC f
INI
= f
INQ
= 5.5MHz, DAC f
OUTI
=
f
OUTQ
= 2.2MHz
N
V
REF
AD1 = 0 (default)
AD1 = 1
10
2.048
V
DD
85
dB
1.29
1.14
0.96
0.78
±400
1.36
1.2
1.05
0.89
1.42
1.27
1.15
1.03
V
mV
SFDR
THD
SNR
f
OUT
= 2.2MHz
f
OUT
= 2.2MHz
f
OUT
= 2.2MHz
f
OUTX,Y
= 2MHz, f
OUTY,X
= 2.2MHz
Measured at DC
f
OUT
= 2.2MHz
-0.4
61
f
CLK
N
D
IM3
(Note 2)
f
OUT
= 2.2MHz
f
OUT1
= 2MHz, f
OUT2
= 2.2MHz
-129
-70
10
72.9
-71
59.3
88
±0.01
±0.1
800
+0.4
-60.5
22
MHz
dBFS/Hz
dBc
pV
•
s
dBc
dBc
dB
dB
dB
Degrees
Ω
N
INL
DNL
V
OS
Guaranteed monotonic (Note 6)
-0.75
-4
-40
10
±0.3
±0.2
±0.03
±0.8
+0.75
+4
+40
Bits
LSB
LSB
mV
mV
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX19712
Tx DAC INTERCHANNEL CHARACTERISTICS
Bits
V
_______________________________________________________________________________________
5
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