19-3196; Rev 0; 2/04
KIT
ATION
EVALU
E
BL
AVAILA
Dual, 10-Bit, 80Msps, Current-Output DAC
General Description
The MAX5853 dual, 10-bit, 80Msps digital-to-analog
converter (DAC) provides superior dynamic performance
in wideband communication systems. The device inte-
grates two 10-bit DAC cores, and a 1.24V reference. The
converter supports single-ended and differential modes
of operation. The MAX5853 dynamic performance is
maintained over the entire 2.7V to 3.6V power-supply
operating range. The analog outputs support a -1.0V to
+1.25V compliance voltage.
The MAX5853 can also operate in interleave data mode
to reduce the I/O pin count. This allows the converter to
be updated on a single, 10-bit bus.
The MAX5853 features digital control of channel gain
matching to within ±0.4dB in sixteen 0.05dB steps.
Channel matching improves sideband suppression in
analog quadrature modulation applications. The on-
chip 1.24V bandgap reference includes a control
amplifier that allows external full-scale adjustments of
both channels through a single resistor. The internal ref-
erence can be disabled and an external reference may
be applied for high-accuracy applications.
The MAX5853 features full-scale current outputs of 2mA
to 20mA and operates from a 2.7V to 3.6V single supply.
The DAC supports three modes of power-control opera-
tion: normal, low-power standby, and complete power-
down. In power-down mode, the operating current is
reduced to 1µA.
The MAX5853 is packaged in a 40-pin thin QFN with
exposed paddle (EP) and is specified for the extended
(-40°C to +85°C) temperature range.
Pin-compatible, higher speed, and lower resolution
versions are also available. Refer to the MAX5854
(10-bit, 165Msps), the MAX5852** (8-bit, 165Msps), and
the MAX5851** (8-bit, 80Msps) data sheets for more
information. See
Table 4
at the end of the data sheet.
o
10-Bit, 80Msps Dual DAC
o
Low Power
77mW with I
FS
= 5mA at f
CLK
= 80MHz
o
2.7V to 3.6V Single Supply
o
Full Output Swing and Dynamic Performance at
2.7V Supply
o
Superior Dynamic Performance
78dBc SFDR at f
OUT
= 20MHz
o
Programmable Channel Gain Matching
o
Integrated 1.24V Low-Noise Bandgap Reference
o
Single-Resistor Gain Control
o
Interleaved Data Mode
o
Single-Ended and Differential Clock Input Modes
o
Miniature 40-Pin Thin QFN Package, 6mm x 6mm
o
EV Kit Available—MAX5854 EV Kit
Features
MAX5853
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
40 Thin QFN-EP*
MAX5853ETL
-40°C to +85°C
*EP
= Exposed paddle.
Pin Configuration
OUTNA
OUTNB
OUTPA
OUTPB
TOP VIEW
AGND
AV
DD
AGND
AV
DD
40 39 38 37 36 35 34 33 32 31
REFO
30
CV
DD
29
CGND
28
CLK
27
CV
DD
26
CLKXN
25
CLKXP
24
DCE
23
CW
22
DB0
21
DB1
DA9/PD
DA8/DACEN
DA7/IDE
DA6/REN
DA5/G3
DA4/G2
DA3/G1
DA2/G0
DA1
DA0
1
2
3
4
5
6
7
8
9
10
11 12 13 14 15 16 17 18 19 20
EP
Applications
Communications
SatCom, LMDS, MMDS, HFC, DSL, WLAN,
Point-to-Point Microwave Links
Wireless Base Stations
Quadrature Modulation
Direct Digital Synthesis (DDS)
Instrumentation/ATE
MAX5853
DGND
DB9
DB7
DB6
DB5
DB4
DB3
REFR
**Future
product—contact factory for availability.
THIN QFN
________________________________________________________________
Maxim Integrated Products
DV
DD
DB8
DB2
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Dual, 10-Bit, 80Msps, Current-Output DAC
MAX5853
ABSOLUTE MAXIMUM RATINGS
AV
DD
to AGND .........................................................-0.3V to +4V
DV
DD
to DGND.........................................................-0.3V to +4V
CV
DD
to CGND.........................................................-0.3V to +4V
AV
DD
to DV
DD
.............................................................-4V to +4V
AGND to DGND.....................................................-0.3V to +0.3V
AGND to CGND.....................................................-0.3V to +0.3V
DGND to CGND ....................................................-0.3V to +0.3V
DA9–DA0, DB9–DB0,
CW, DCE
to DGND ...............-0.3V to +4V
CLK to CGND ..........................................-0.3V to (CV
DD
+ 0.3V)
CLKXN, CLKXP to CGND.........................................-0.3V to +4V
REFR, REFO to AGND .............................-0.3V to (AV
DD
+ 0.3V)
OUTPA, OUTNA to AGND ..........(AV
DD
- 4.8V) to (AV
DD
+ 0.3V)
OUTPB, OUTNB to AGND ..........(AV
DD
- 4.8V) to (AV
DD
+ 0.3V)
Maximum Current into Any Pin
(excluding power supplies) ..........................................±50mA
Continuous Power Dissipation (T
A
= +70°C)
40-Pin Thin QFN (derate 26.3mW/°C above +70°C)....2105mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
DD
= DV
DD
= CV
DD
= 3V, AGND = DGND = CGND = 0, f
DAC
= 80Msps, differential clock, external reference, V
REF
= 1.2V, I
FS
=
20mA, differential output, output amplitude = 0dBFS, T
A
= T
MIN
to T
MAX
, unless otherwise noted. T
A
≥
+25°C, guaranteed by produc-
tion test. T
A
< +25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
STATIC PERFORMANCE
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error (See Also
Gain Error
Definition
Section)
Gain-Error Temperature Drift
DYNAMIC PERFORMANCE
f
CLK
= 80MHz,
A
OUT
= -1dBFS
Spurious-Free Dynamic Range to
Nyquist
SFDR
f
CLK
= 44MHz,
A
OUT
= -1dBFS
f
CLK
= 25MHz,
A
OUT
= -1dBFS
f
OUT
= 10MHz
f
OUT
= 20MHz
f
OUT
= 30MHz
f
OUT
= 10MHz
f
OUT
= 1MHz
69.5
78
78
72
78
79
85
82
82
74
dBc
dBc
dBc
N
INL
DNL
V
OS
GE
Internal reference (Note1)
External reference
Internal reference
External reference
R
L
= 0
Guaranteed monotonic, R
L
= 0
10
-1.0
-0.5
-0.5
-11.0
-6.25
±0.25
±0.2
±0.1
±1.5
±0.7
±150
±100
+1.0
+0.5
+0.5
+6.8
+4.10
Bits
LSB
LSB
LSB
%FSR
ppm/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
f
CLK
= 80MHz, f
OUT
= 10MHz,
A
OUT
= -1dBFS, span = 10MHz
Spurious-Free Dynamic Range
Within a Window
SFDR
f
CLK
= 65MHz, f
OUT
= 5MHz,
A
OUT
= -1dBFS, span = 2.5MHz
f
CLK
= 25MHz, f
OUT
= 1MHz,
A
OUT
= -1dBFS, span = 2MHz
Multitone Power Ratio to Nyquist
MTPR
8 tones at 400kHz spacing, f
CLK
= 78MHz,
f
OUT
= 15MHz to 18.2MHz
2
_______________________________________________________________________________________
Dual, 10-Bit, 80Msps, Current-Output DAC
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= CV
DD
= 3V, AGND = DGND = CGND = 0, f
DAC
= 80Msps, differential clock, external reference, V
REF
= 1.2V, I
FS
=
20mA, differential output, output amplitude = 0dBFS, T
A
= T
MIN
to T
MAX
, unless otherwise noted. T
A
≥
+25°C, guaranteed by produc-
tion test. T
A
< +25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
Multitone Spurious-Free Dynamic
Range Within a Window
SYMBOL
CONDITIONS
8 tones at 811kHz spacing, f
CLK
= 80MHz,
f
OUT
= 10.8MHz to 17.2MHz, span = 15MHz
f
CLK
= 80MHz,
A
OUT
= -1dBFS
Total Harmonic Distortion to
Nyquist (2nd- Through 8th-Order
Harmonics Included)
THD
f
CLK
= 44MHz,
A
OUT
= -1dBFS
f
CLK
= 25MHz,
A
OUT
= -1dBFS
Output Channel-to-Channel
Isolation
Channel-to-Channel Gain
Mismatch
Channel-to-Channel Phase
Mismatch
Signal-to-Noise Ratio to Nyquist
Maximum DAC Conversion Rate
Glitch Impulse
Output Settling Time
Output Rise Time
Output Fall Time
ANALOG OUTPUT
Full-Scale Output Current Range
Output Voltage Compliance
Range
Output Leakage Current
REFERENCE
Internal-Reference Output
Voltage
Internal-Reference Supply
Rejection
Internal-Reference Output-
Voltage Temperature Drift
TCV
REFO
V
REFO
REN
= 0
AV
DD
varied from 2.7V to 3.6V
REN
= 0
1.13
1.24
0.5
±50
1.32
V
mV/V
ppm/°C
Shutdown or standby mode
I
FS
2
-1.00
-5
20
+1.25
+5
mA
V
µA
t
S
To ±0.1% error band (Note 3)
10% to 90% (Note 3)
90% to 10% (Note 3)
SNR
f
DAC
f
OUT
= 10MHz
f
OUT
= 10MHz, G[3:0] = 1000
f
OUT
= 10MHz
f
CLK
= 80MHz, f
OUT
= 5MHz, I
FS
= 20mA
f
CLK
= 80MHz, f
OUT
= 5MHz, I
FS
= 5mA
Interleaved mode disabled, IDE = 0
Interleaved mode enabled, IDE = 1
80
80
5
12
2.2
2.2
f
OUT
= 10MHz
f
OUT
= 20MHz
f
OUT
= 30MHz
f
OUT
= 10MHz
f
OUT
= 1MHz
MIN
TYP
76
-76
-75
-70
-76
-76
90
0.025
0.05
62
62
dB
dB
Degrees
dB
Msps
pV-s
ns
ns
ns
dBc
MAX
UNITS
dBc
MAX5853
_______________________________________________________________________________________
3
Dual, 10-Bit, 80Msps, Current-Output DAC
MAX5853
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= CV
DD
= 3V, AGND = DGND = CGND = 0, f
DAC
= 80Msps, differential clock, external reference, V
REF
= 1.2V, I
FS
=
20mA, differential output, output amplitude = 0dBFS, T
A
= T
MIN
to T
MAX
, unless otherwise noted. T
A
≥
+25°C, guaranteed by produc-
tion test. T
A
< +25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
Internal-Reference Output Drive
Capability
External-Reference Input Voltage
Range
Current Gain
I
FS
/I
REF
0.65 x
DV
DD
0.3 x
DV
DD
-1
3
0.65 x
CV
DD
0.3 x
CV
DD
-1
3
0.9 x
CV
DD
0.1 x
CV
DD
+1
+1
LOGIC INPUTS
(DA9–DA0, DB9–DB0,
CW)
Digital Input-Voltage High
Digital Input-Voltage Low
Digital Input Current
Digital Input Capacitance
V
IH
V
IL
I
IN
C
IN
V
V
µA
pF
SYMBOL
REN
= 0
REN
= 1
0.10
CONDITIONS
MIN
TYP
50
1.2
32
1.32
MAX
UNITS
µA
V
mA/mA
SINGLE-ENDED CLOCK INPUT/OUTPUT AND
DCE
INPUT
(CLK,
DCE)
Digital Input-Voltage High
Digital Input-Voltage Low
Digital Input Current
Digital Input Capacitance
Digital Output-Voltage High
Digital Output-Voltage Low
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
DCE
= 1
DCE
= 1
DCE
= 1
DCE
= 1
DCE
= 0, I
SOURCE
= 0.5mA, Figure 1
DCE
= 0, I
SINK
= 0.5mA, Figure 1
V
V
µA
pF
V
V
DIFFERENTIAL CLOCK INPUTS
(CLKXP/CLKXN)
Differential Clock Input Internal
Bias
Differential Clock Input Swing
Clock Input Impedance
POWER REQUIREMENTS
Analog Power-Supply Voltage
Digital Power-Supply Voltage
Clock Power-Supply Voltage
AV
DD
DV
DD
CV
DD
I
FS
= 20mA (Note 2), single-ended clock
mode
Analog Supply Current
I
AVDD
I
FS
= 20mA (Note 2), differential clock mode
I
FS
= 2mA (Note 2), single-ended clock
mode
I
FS
= 2mA (Note 2), differential clock mode
2.7
2.7
2.7
3
3
3
43.2
43.2
5
5
3.6
3.6
3.6
46
mA
V
V
V
Measured single ended
0.5
5
CV
DD
/ 2
V
V
kΩ
4
_______________________________________________________________________________________
Dual, 10-Bit, 80Msps, Current-Output DAC
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= CV
DD
= 3V, AGND = DGND = CGND = 0, f
DAC
= 80Msps, differential clock, external reference, V
REF
= 1.2V, I
FS
=
20mA, differential output, output amplitude = 0dBFS, T
A
= T
MIN
to T
MAX
, unless otherwise noted. T
A
≥
+25°C, guaranteed by produc-
tion test. T
A
< +25°C guaranteed by design and characterization. Typical values are at T
A
= +25°C.)
PARAMETER
Digital Supply Current
SYMBOL
I
DVDD
CONDITIONS
I
FS
= 20mA (Note 2), single-ended clock
mode
I
FS
= 20mA (Note 2), differential clock mode
Clock Supply Current
Total Standby Current
Total Shutdown Current
I
CVDD
I
STANDBY
I
SHDN
Single-ended clock mode (DCE = 1)
(Note 2)
Differential clock mode (DCE = 0) (Note 2)
I
AVDD
+ I
DVDD
+ I
CVDD
I
AVDD
+ I
DVDD
+ I
CVDD
Single-ended clock
mode (DCE = 1)
Total Power Dissipation
P
TOT
Differential clock
mode (DCE = 0)
Standby
Shutdown
TIMING CHARACTERISTICS
(Figures 5 and 6)
Propagation Delay
DAC Data to CLK Rise/Fall
Setup Time
DAC Data to CLK Rise/Fall
Hold Time
Control Word to
CW
Rise
Setup Time
Control Word to
CW
Rise
Hold Time
CW
High Time
CW
Low Time
t
DCS
t
DCH
t
CS
t
CW
t
CWH
t
CWL
Single-ended clock mode (
DCE
= 1) (Note 4)
Differential clock mode (DCE = 0) (Note 4)
Single-ended clock mode (
DCE
= 1) (Note 4)
Differential clock mode (DCE = 0) (Note 4)
1.2
2.7
0.8
-0.5
2.5
2.5
5
5
1
Clock
cycles
ns
ns
ns
ns
ns
ns
I
FS
= 20mA (Note 2)
I
FS
= 2mA (Note 2)
I
FS
= 20mA (Note 2)
I
FS
= 2mA (Note 2)
MIN
TYP
3.4
3.4
11.1
16.7
3.1
1
173
58
190
75
9.3
0.003
11.1
mW
191
3.7
mA
µA
13.5
mA
MAX
4
UNITS
mA
MAX5853
_______________________________________________________________________________________
5
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