IS61WV10248EDBLL
IS64WV10248EDBLL
1M x 8 HIGH-SPEED ASYNCHRONOUS
CMOS STATIC RAM WITH ECC
FEATURES
• High-speed access times: 8, 10, 20 ns
• High-performance, low-power CMOS process
• Multiple center power and ground pins for
greater noise immunity
•
Easy memory expansion with
CE
and
OE
options
•
CE
power-down
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Packages available:
–
48-ball miniBGA (6mm x 8mm)
– 44-pin TSOP (Type II)
• Industrial and Automotive Temperature Support
• Lead-free available
FEBRUARY 2013
DESCRIPTION
The
ISSI
IS61/64WV10248EDBLL are very high-speed,
low power, 1M-word by 8-bit CMOS static RAM. The
IS61/64WV10248EDBLL are fabricated using
ISSI
's
high-performance CMOS technology. This highly reli-
able process coupled with innovative circuit design
techniques, yields higher performance and low power
consumption devices.
When CE is HIGH (deselected), the device assumes
a standby mode at which the power dissipation can be
reduced down with CMOS input levels.
The IS61/64WV10248EDBLL operate from a single
power supply and all inputs are TTL-compatible.
The IS61/64WV10248EDBLL are available in 48 ball
mini BGA (6mm x 8mm) and 44-pin TSOP (Type II)
packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A19
Decoder
Memory Array
(1024Kx8)
ECC Array
(1024Kx4)
8
8
IO0-7
I/O Data
Circuit
8
ECC
12
4
Column I/O
/CE
/OE
/WE
Control
Circuit
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
02/20/2013
1
IS61WV10248EDBLL
IS64WV10248EDBLL
TRUTH TABLE
Mode
Not Selected
(Power-down)
WE
X
CE
H
L
L
L
OE
X
H
L
X
I/O Operation V
DD
Current
High-Z
High-Z
d
out
d
In
I
sb
1
, I
sb
2
I
cc
I
cc
I
cc
Output Disabled H
Read
H
Write
L
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
term
V
dd
t
stg
P
t
Parameter
Terminal Voltage with Respect to GND
V
dd
Relates to GND
Storage Temperature
Power Dissipation
Value
–0.5 to V
dd
+ 0.5
–0.3 to 4.0
–65 to +150
1.0
Unit
V
V
°C
W
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
CAPACITANCE
(1,2)
Symbol
c
In
c
I/o
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
In
= 0V
V
out
= 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
a
= 25°c,
f = 1 MHz, V
dd
= 3.3V.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
02/20/2013
3
IS61WV10248EDBLL
IS64WV10248EDBLL
OPERATING RANGE (V
DD
)
1
Range
Industrial
Automotive (A1)
Automotive (A3)
Ambient Temperature
–40°C to +85°C
–40°C to +85°C
–40°C to +125°C
IS61WV10248EDBLL
V
DD
(8, 10n
S
)
2.4V-3.6V
—
—
IS64WV10248EDBLL
V
DD
(10n
S
)
—
2.4V-3.6V
2.4V-3.6V
Note:
1. Contact SRAM@issi.com for 1.8V option
ERROR DETECTION AND ERROR CORRECTION
•
•
•
•
Independent ECC with hamming code for each byte
Detect and correct one bit error per byte
Better reliability than parity code schemes which can only detect an error but not correct an error
Backward Compatible: Drop in replacement to current in industry standard devices (without ECC)
4
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
02/20/2013
stm32/stm8
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