71M6541D/F/G and 71M6542F/G
Energy Meter ICs
GENERAL DESCRIPTION
BENEFITS AND FEATURES
SoC Integration and Unique Isolation Technique
Reduces BOM Cost Without Sacrificing
Performance
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The 71M6541D/71M6541F/71M6541G/71M6542F/71M6542G (71M654x) are
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4th-generation single-phase metering SoCs with a 5MHz 8051-
compatible MPU core, low-power RTC with digital temperature
compensation, flash memory, and LCD driver. Our Single Converter
Technology® with a 22-bit delta-sigma ADC, three or four analog
inputs, digital temperature compensation, precision voltage
reference, and a 32-bit computation engine (CE) supports a wide
range of metering applications with very few external components.
The 71M6541/2 devices support optional interfaces to the 71M6x01
series of isolated sensors, which offer BOM cost reduction, immunity
to magnetic tamper, and enhanced reliability. Other features include
an SPI interface, advanced power management, ultra-low-power
operation in active and battery modes, 3/5KB shared RAM and
32/64/128KB of flash memory that can be programmed in the field
with code and/or data during meter operation and the ability to drive
up to six LCD segments per SEG driver pin. High processing and
sampling rates combined with differential inputs offer a powerful
metering platform for residential meters.
A complete array of code development tools, demonstration code,
and reference designs enable rapid development and certification of
meters that meet all ANSI and IEC electricity metering standards
worldwide.
The 71M654x family operates over the industrial temperature range
and comes in 64-pin (71M6541D/F/G) and 100-pin (71M6542F/G)
lead(Pb)-free LQFP packages.
NEUTRAL
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0.1% Typical Accuracy Over 2000:1 Current
Range
Exceeds IEC 62053/ANSI C12.20 Standards
Four-Quadrant Metering
46-64Hz Line Frequency Range with the
Same Calibration
Phase
Compensation (±10°)
Independent 32-Bit Compute Engine
32KB Flash, 3KB RAM (71M6541D)
64KB
Flash, 5KB RAM (71M6541F/42F)
128KB
Flash, 5KB RAM (71M6541G/42G)
Built-In Flash Security
SPI interface for Flash Program Capability
Up to Four Pulse Outputs with Pulse Count
8-Bit MPU (80515), Up to 5 MIPS
Full-Speed MPU Clock in Brownout Mode
LCD
Driver Allows Up to 6 Commons/Up to
56 Pins
5V LCD Driver with DAC
Shunt
LOAD
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Shunt
Note:
This system is referenced to LINE
LINE
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Up to 51 Multifunction DIO Pins
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Hardware
Watchdog Timer (WDT)
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Two UARTs for IR and AMR
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IR
LED Driver with Modulation
Innovative Isolation Technology (Requires
Companion 71M6xxx Sensor, also from Maxim
Integrated) Eliminates Current Transformers
Two Current Sensor Inputs with Selectable
Differential Mode
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Selectable Gain of 1 or 8 for One Current
Input to Support Shunts
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High-Speed
Wh/VARh Pulse Outputs with
Programmable Width
Digital Temperature Compensation Improves
System Performance
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Metrology Compensation
Accurate RTC for TOU Functions with
Automatic Temperature Compensation for
Crystal in All Power Modes
Power Management Extends Battery Life During
Power Outages
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Three Battery-Backup Modes:
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Brownout Mode (BRN)
o
LCD Mode (LCD)
o
Sleep Mode (SLP)
Wake-Up
on Pin Events and Wake-On
Timer
1µA in Sleep Mode
NEUTRAL
LINE
POWER SUPPLY
Resistor Divider
71M6xx1
MUX and ADC
IAP
IAN
Pulse
Trans-
former
VA
IBP
IBN
VREF
SERIAL PORTS
V3P3A V3P3SYS GNDA GNDD
PWR MODE
CONTROL
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BATTERY
LINE
71M6541D/F/G
WAKE-UP
REGULATOR
VBAT
VBAT_RTC
TEMPERATURE
BATTERY
MONITOR
RTC
BATTERY
SENSOR
RAM
COMPUTE
ENGINE
FLASH
MEMORY
COM0...5
SEG
SEG/DIO
LCD DRIVER
DIO, PULSES
DIO
LCD DISPLAY
AMR
TX
RX
MODUL- RX
ATOR TX
POWER FAULT
COMPARATOR
8888.8888
PULSES,
DIO
I C or µWire
EEPROM
2
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IR
MPU
RTC
TIMERS
ICE
V3P3D
OSCILLATOR/
PLL
XIN
XOUT
HOST
SPI INTERFACE
32 kHz
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11/5/2010
Single Converter Technology is a registered trademark of Maxim Integrated
Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
19-5376; Rev 5; 1/15
71M6541D/F/G and 71M6542F/G Data Sheet
Table of Contents
1
2
Introduction ....................................................................................................................................... 10
Hardware Description ....................................................................................................................... 11
2.1 Hardware Overview ................................................................................................................... 11
2.2 Analog Front End (AFE)............................................................................................................. 12
2.2.1 Signal Input Pins ............................................................................................................ 14
2.2.2 Input Multiplexer............................................................................................................. 15
2.2.3 Delay Compensation ..................................................................................................... 19
2.2.4 ADC Pre-Amplifier ......................................................................................................... 20
2.2.5 A/D Converter (ADC) ..................................................................................................... 20
2.2.6 FIR Filter ........................................................................................................................ 20
2.2.7 Voltage References ....................................................................................................... 20
2.2.8 71M6x01 Isolated Sensor Interface (Remote Sensor Interface) ................................... 22
2.3 Digital Computation Engine (CE) ............................................................................................... 24
2.3.1 CE Program Memory ..................................................................................................... 24
2.3.2 CE Data Memory ........................................................................................................... 24
2.3.3 CE Communication with the MPU ................................................................................. 25
2.3.4 Meter Equations ............................................................................................................. 25
2.3.5 Real-Time Monitor (RTM) .............................................................................................. 25
2.3.6 Pulse Generators ........................................................................................................... 27
2.3.7 CE Functional Overview ................................................................................................ 28
2.4 80515 MPU Core ....................................................................................................................... 31
2.4.1 Memory Organization and Addressing .......................................................................... 31
2.4.2 Special Function Registers (SFRs)................................................................................ 33
2.4.3 Generic 80515 Special Function Registers ................................................................... 34
2.4.4 Instruction Set ................................................................................................................ 37
2.4.5 UARTs ........................................................................................................................... 37
2.4.6 Timers and Counters ..................................................................................................... 39
2.4.7 WD Timer (Software Watchdog Timer) ......................................................................... 41
2.4.8 Interrupts ........................................................................................................................ 41
2.5 On-Chip Resources ................................................................................................................... 48
2.5.1 Physical Memory............................................................................................................ 48
2.5.2 Oscillator ........................................................................................................................ 50
2.5.3 PLL and Internal Clocks................................................................................................. 50
2.5.4 Real-Time Clock (RTC) ................................................................................................. 51
2.5.5 71M654x Temperature Sensor ...................................................................................... 56
2.5.6 71M654x Battery Monitor ............................................................................................... 57
2.5.7 UART and Optical Interface ........................................................................................... 58
2.5.8 Digital I/O and LCD Segment Drivers ............................................................................ 59
2.5.9 EEPROM Interface ........................................................................................................ 70
2.5.10 SPI Slave Port................................................................................................................ 73
2.5.11 Hardware Watchdog Timer ............................................................................................ 78
2.5.12 Test Ports (TMUXOUT and TMUX2OUT Pins) ............................................................. 78
Functional Description ..................................................................................................................... 80
3.1 Theory of Operation ................................................................................................................... 80
3.2 Battery Modes ............................................................................................................................ 81
3.2.1 BRN Mode ..................................................................................................................... 83
3.2.2 LCD Mode ...................................................................................................................... 83
3.2.3 SLP Mode ...................................................................................................................... 84
Rev 5
3
2
71M6541D/F/G and 71M6542F/G Data Sheet
3.3
Fault and Reset Behavior .......................................................................................................... 85
3.3.1 Events at Power-Down .................................................................................................. 85
3.3.2 IC Behavior at Low Battery Voltage ............................................................................... 86
3.3.3 Reset Sequence ............................................................................................................ 86
3.3.4 Watchdog Timer Reset .................................................................................................. 86
3.4 Wake Up Behavior ..................................................................................................................... 87
3.4.1 Wake on Hardware Events ............................................................................................ 87
3.4.2 Wake on Timer............................................................................................................... 90
3.5 Data Flow and MPU/CE Communication ................................................................................... 91
Application Information .................................................................................................................... 92
4.1 Connecting 5 V Devices............................................................................................................. 92
4.2 Direct Connection of Sensors .................................................................................................... 92
4.3 71M6541D/F/G Using Local Sensors ........................................................................................ 93
4.4 71M6541D/F/G Using 71M6x01and Current Shunts ................................................................. 94
4.5 71M6542F/G Using Local Sensors ............................................................................................ 95
4.6 71M6542F/G Using 71M6x01 and Current Shunts ................................................................... 96
4.7 Metrology Temperature Compensation ..................................................................................... 97
4.7.1 Voltage Reference Precision ......................................................................................... 97
4.7.2 Temperature Coefficients for the 71M654x ................................................................... 97
4.7.3 Temperature Compensation for VREF with Local Sensors ........................................... 98
4.7.4 Temperature Compensation for VREF with Remote Sensor ........................................ 99
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4.8 Connecting I C EEPROMs ...................................................................................................... 100
4.9 Connecting Three-Wire EEPROMs ......................................................................................... 101
4.10 UART0 (TX/RX) ....................................................................................................................... 101
4.11 Optical Interface (UART1)........................................................................................................ 101
4.12 Connecting the Reset Pin ........................................................................................................ 102
4.13 Connecting the Emulator Port Pins .......................................................................................... 103
4.14 Flash Programming.................................................................................................................. 104
4.14.1 Flash Programming via the ICE Port ........................................................................... 104
4.14.2 Flash Programming via the SPI Port ........................................................................... 104
4.15 MPU Firmware Library ............................................................................................................. 104
4.16 Crystal Oscillator ...................................................................................................................... 104
4.17 Meter Calibration ...................................................................................................................... 104
Firmware Interface .......................................................................................................................... 105
5.1 I/O RAM Map –Functional Order ............................................................................................. 105
5.2 I/O RAM Map – Alphabetical Order ......................................................................................... 111
5.3 CE Interface Description .......................................................................................................... 126
5.3.1 CE Program ................................................................................................................. 126
5.3.2 CE Data Format ........................................................................................................... 126
5.3.3 Constants ..................................................................................................................... 126
5.3.4 Environment ................................................................................................................. 127
5.3.5 CE Calculations ........................................................................................................... 127
5.3.6 CE Front End Data (Raw Data) ................................................................................... 128
5.3.7 FCE Status and Control ............................................................................................... 128
5.3.8 CE Transfer Variables ................................................................................................. 131
5.3.9 Pulse Generation ......................................................................................................... 133
5.3.10 Other CE Parameters .................................................................................................. 135
5.3.11 CE Calibration Parameters .......................................................................................... 136
5.3.12 CE Flow Diagrams ....................................................................................................... 137
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5
Rev 5
71M6541D/F/G and 71M6542F/G Data Sheet
6
Electrical Specifications................................................................................................................. 139
6.1 Absolute Maximum Ratings ..................................................................................................... 139
6.2 Recommended External Components ..................................................................................... 140
6.3 Recommended Operating Conditions ...................................................................................... 140
6.4 Performance Specifications ..................................................................................................... 141
6.4.1 Input Logic Levels ........................................................................................................ 141
6.4.2 Output Logic Levels ..................................................................................................... 141
6.4.3 Battery Monitor............................................................................................................. 142
6.4.4 Temperature Monitor ................................................................................................... 142
6.4.5 Supply Current ............................................................................................................. 143
6.4.6 V3P3D Switch .............................................................................................................. 144
6.4.7 Internal Power Fault Comparators ............................................................................... 144
6.4.8 2.5 V Voltage Regulator – System Power ................................................................... 144
6.4.9 2.5 V Voltage Regulator – Battery Power .................................................................... 145
6.4.10 Crystal Oscillator .......................................................................................................... 145
6.4.11 Phase-Locked Loop (PLL) ........................................................................................... 145
6.4.12 LCD Drivers ................................................................................................................. 146
6.4.13 VLCD Generator .......................................................................................................... 147
6.4.14 VREF ........................................................................................................................... 149
6.4.15 ADC Converter............................................................................................................. 150
6.4.16 Pre-Amplifier for IAP-IAN ............................................................................................. 151
6.5 Timing Specifications ............................................................................................................... 152
6.5.1 Flash Memory .............................................................................................................. 152
6.5.2 SPI Slave ..................................................................................................................... 152
6.5.3 EEPROM Interface ...................................................................................................... 152
6.5.4 RESET Pin ................................................................................................................... 153
6.5.5 RTC.............................................................................................................................. 153
6.6 Package Outline Drawings....................................................................................................... 154
6.6.1 64-Pin LQFP Outline Package Drawing ...................................................................... 154
6.6.2 100-Pin LQFP Package Outline Drawing .................................................................... 155
6.7 Package Markings ................................................................................................................... 156
6.8 Pinout Diagrams ...................................................................................................................... 157
6.8.1 71M6541D/F/G LQFP-64 Package Pinout .................................................................. 157
6.8.2 71M6542F/G LQFP-100 Package Pinout .................................................................... 158
6.9 Pin Descriptions ....................................................................................................................... 159
6.9.1 Power and Ground Pins ............................................................................................... 159
6.9.2 Analog Pins .................................................................................................................. 160
6.9.3 Digital Pins ................................................................................................................... 161
6.9.4 I/O Equivalent Circuits ................................................................................................. 163
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Ordering Information ...................................................................................................................... 164
7.1 71M6541D/F/G and 71M6542F/G ........................................................................................... 164
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Related Information ........................................................................................................................ 164
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Contact Information ........................................................................................................................ 164
Appendix A: Acronyms .......................................................................................................................... 165
Appendix B: Revision History................................................................................................................ 166
4
Rev 5
71M6541D/F/G and 71M6542F/G Data Sheet
Figures
Figure 1: IC Functional Block Diagram ......................................................................................................... 9
Figure 2. 71M6541D/F/G AFE Block Diagram (Local Sensors) ................................................................. 12
Figure 3. 71M6541D/F/G AFE Block Diagram with 71M6x01 .................................................................... 13
Figure 4. 71M6542F/G AFE Block Diagram (Local Sensors) ..................................................................... 13
Figure 5. 71M6542F/G AFE Block Diagram with 71M6x01 ........................................................................ 14
Figure 6: States in a Multiplexer Frame (MUX_DIV[3:0] = 3) ..................................................................... 17
Figure 7: States in a Multiplexer Frame (MUX_DIV[3:0] = 4) ..................................................................... 17
Figure 8: General Topology of a Chopped Amplifier .................................................................................. 21
Figure 9: CROSS Signal with
CHOP_E
= 00 ............................................................................................... 21
Figure 10: RTM Timing ............................................................................................................................... 26
Figure 11: Timing Relationship Between ADC MUX, CE, and RTM Serial Transfer .................................. 26
Figure 12. Pulse Generator FIFO Timing.................................................................................................... 28
Figure 13: Accumulation Interval ................................................................................................................ 29
Figure 14: Samples from Multiplexer Cycle (MUX_DIV[3:0] = 3) ............................................................... 30
Figure 15: Samples from Multiplexer Cycle (MUX_DIV[3:0] = 4) ............................................................... 30
Figure 16: Interrupt Structure ...................................................................................................................... 47
Figure 17: Automatic Temperature Compensation ..................................................................................... 54
Figure 18: Optical Interface ......................................................................................................................... 58
Figure 19: Optical Interface (UART1) ......................................................................................................... 59
Figure 20: Connecting an External Load to DIO Pins ................................................................................. 60
Figure 21: LCD Waveforms......................................................................................................................... 68
Figure 22: 3-Wire Interface. Write Command, HiZ=0. ............................................................................... 72
Figure 23: 3-Wire Interface. Write Command, HiZ=1 ................................................................................ 72
Figure 24: 3-Wire Interface. Read Command. ........................................................................................... 72
Figure 25: 3-Wire Interface. Write Command when CNT=0 ...................................................................... 73
Figure 26: 3-Wire Interface. Write Command when HiZ=1 and WFR=1. .................................................. 73
Figure 27: SPI Slave Port - Typical Multi-Byte Read and Write Operations ............................................... 75
Figure 28: Voltage, Current, Momentary and Accumulated Energy ........................................................... 80
Figure 29: Operation Modes State Diagram ............................................................................................... 81
Figure 30: MPU/CE Data Flow .................................................................................................................... 91
Figure 31: Resistive Voltage Divider (Voltage Sensing) ............................................................................. 92
Figure 32. CT with Single-Ended Input Connection (Current Sensing) ...................................................... 92
Figure 33: CT with Differential Input Connection (Current Sensing) .......................................................... 92
Figure 34: Differential Resistive Shunt Connections (Current Sensing) ..................................................... 92
Figure 35. 71M6541D/F/G with Local Sensors ........................................................................................... 93
Figure 36: 71M6541D/F/G with 71M6x01 isolated Sensor ......................................................................... 94
Figure 37: 71M6542F/G with Local Sensors............................................................................................... 95
Figure 38: 71M6542F/G with 71M6x01 Isolated Sensor ............................................................................ 96
2
Figure 39: I C EEPROM Connection ........................................................................................................ 100
Figure 40: Connections for UART0 ........................................................................................................... 101
Figure 41: Connection for Optical Components ........................................................................................ 102
Figure 42: External Components for the RESET Pin: Push-Button (Left), Production Circuit (Right) ......... 102
Figure 43: External Components for the Emulator Interface .................................................................... 103
Figure 44: CE Data Flow: Multiplexer and ADC........................................................................................ 137
Figure 45: CE Data Flow: Scaling, Gain Control, Intermediate Variables ................................................ 137
Figure 46: CE Data Flow: Squaring and Summation Stages .................................................................... 138
Figure 47: 64-pin LQFP Package Outline ................................................................................................. 154
Figure 48: 100-pin LQFP Package Outline ............................................................................................... 155
Figure 49. Package Markings (Examples) ................................................................................................ 156
Figure 50: Pinout for the 71M6541D/F/G (LQFP-64 Package)................................................................. 157
Figure 51: Pinout for the 71M6542F/G (LQFP-100 Package) .................................................................. 158
Figure 52: I/O Equivalent Circuits ............................................................................................................. 163
Rev 5
5
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