Si4700/01/02/03-EVB
Si4700/01/02/03 E
VALUATION
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1. Introduction—Si4700/01/02/03 EVB
Thank you for purchasing the Silicon Laboratories, Inc. Si4700/01/02/03 FM Tuner Evaluation Board (EVB). This
EVB and associated software have been designed to speed the overall development process and decrease the
required development time from EVB to product launch. We have posted support articles, answers to frequently
asked questions, and application notes at
https://www.mysilabs.com.
The Si4700/01/02/03 EVB kit should include the following important items:
Si4700/01/02/03
FM Tuner customer welcome and evaluation letter
Si4700/01/02/03 baseboard Revision 1.2
Si4700/01/02/03 daughter card with pre-mounted Si4700/01 Revision 1.3 or Si4702/03 Revision 1.1
Wall transformer certified at 5 V/2 A, 100–240 V ac input and power input terminal (green)
USB cable
BNC to RCA adapters (2)
RCA to 1/8” jack cable
1/8” barrel adapter (1)
EVB Characterization Report
Si4700/01/02/03 Quick Start Guide
Si4700/01/02/03 CD including:
Data
sheet
Development application GUI
Note:
This version of the document supports the third generation of the GUI software. Boards shipped prior to May 2006 may
be reprogrammed to use this new GUI. Instructions for doing so can be found on mysilabs.com. For details on the first
generation GUI, please reference the 0.2 version of this document, also available on
https://www.mysilabs.com
.
2. Overview
The Si4700/01/02/03 Evaluation Kit includes an evaluation board (EVB) to facilitate evaluation of the
Si4700/01/02/03 using the associated software. The EVB consists of a baseboard with a pre-mounted daughter
card. The Si4700/01/02/03 is pre-installed on the daughter card. The Si4700 and Si4701 come in a 4 x 4 mm 24-
pin QFN package and the Si4702 and Si4703 come in a 3 x 3 mm 20-pin QFN package. The Si4701 and Si4703
offer RDS support, while the Si4700 and Si4702 do not. Several input/output (I/O) connections provide access to
the various subsystems on the EVB. Refer to Figure 1 for the locations of the various I/O connectors/devices.
This document references the Si4700/01 data sheet and the Si4702/03 data sheet.
Rev. 0.9 1/15
Copyright © 2015 by Silicon Laboratories
Si4700/01/02/03-EVB
Si4700/01/02/03-EVB
2
Rev. 0.9
Si4700/01/02/03-EVB
T
ABLE
Section
OF
C
ONTENTS
Page
1. Introduction—Si4700/01/02/03 EVB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
2. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
3. Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
3.1. Si4700/01/02/03 Baseboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.2. Si4700/01/02/03 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
4. EVB Configuration Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
5. Hardware Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
6. Getting Started—Software Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6.1. Connecting to the EVB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6.2. Running the Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7. Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8. Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.1. Baseboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.2. Si4700/01 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
8.3. Si4702/03 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
9. Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
9.1. Bill of Materials - Baseboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
9.2. Bill of Materials—Si4700/01 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
9.3. Bill of Materials—Si4702/03 Daughter Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
Rev. 0.9
3
Si4700/01/02/03-EVB
3. Description
The following sections refer to both the image in Figure 1 and the silk screen on the Si4700/01/02/03 EVB. It is
recommended to refer to both when using this guide.
J6
J3
X1
J1 - Daughter Card
X1 - Daughter Card
J3 - Daughter Card
J1
U1
U4
PB1
SW1
J2 - Daughter Card
(not visible)
U2
J5 (not visible)
J2
D1
J7
J4
J11
J10
Figure 1. Locations of I/O Connectors/Devices
Baseboard I/O connectors/devices:
J1
J2
J3
J4
J5
J6
J7
J10
J11
D1
USB connector for USB interface
JTAG connector for the C8051F320 MCU
20-pin Expansion I/O connector
Power input terminal block
Baseboard card connector (not visible when the
baseboard and daughter card are mated)
SMA connector for external 32.768 kHz RCLK
clock input
2.1 mm power connector
BNC connector for left audio output
BNC connector for right audio output
LED to confirm power supply to the C8051F320
MCU
Baseboard 32.768 kHz crystal oscillator
Rev. 0.9
SW1 USB (J7–J4) power selection switch
Daughter card I/O connectors/devices:
J1
J2
J3
SMA connector for RF (single-ended or non-
inverting differential) input
Baseboard connector (not visible when the
baseboard and daughter card are mated)
Stereo headphone connector for audio output and
antenna input
U1 Si4700/01/02/03
U2 LOUT/ROUT audio op-amp
U4 Headphone audio op-amp
U5 Schmidt trigger buffer (not visible)
X1
Daughter card 32.768 kHz crystal.
The EVB consists of various subsystems that are
explained in greater detail in the following sections.
PB1 Push-button to reset the C8051F320 MCU
X1
4
Si4700/01/02/03-EVB
3.1. Si4700/01/02/03 Baseboard
3.1.1. Microcontroller and Associated Peripherals
The Si4700/01/02/03 evaluation board uses a Silicon
Laboratories' C8051F320 microcontroller to control the
Si4700/01/02/03 and to provide USB connectivity to the
EVB (via J1). The LED D1 blinks to confirm that power
is being properly supplied to the C8051F320 and the
MCU firmware has loaded. Push-button PB1 manually
resets the C8051F320. The JTAG connector J2 is used
to program the C8051F320 at production time, and is
not necessary for normal operation. J2 can be used for
downloading example code or updating the MCU
firmware. See www.mysilabs.com for details.
3.1.2. Reference Clock for the Si4700/01/02/03
The Si4700/01/02/03 accepts a 32.768 kHz reference
clock input at the RCLK pin. On the baseboard, this
clock is provided by a precision crystal oscillator. The
output of the oscillator is routed to the Si4700/01/02/03
RCLK pin through a Schmitt-trigger buffer (U5) and a
33
series termination resistor (R19). The user has the
option of not using the oscillator and bringing in the
reference clock from an external source through J6.
This can be achieved by depopulating R19 and
populating R21 with a 0
resistor as shown in Table 1.
Note that the reference clock is not routed through the
Schmitt-trigger buffer when an external clock source is
being used. A third option is available which takes
advantage of the Si4700/01/02/03 internal oscillator.
This can be achieved by depopulating R2 and R3 on the
bottom of the daughter card.
3.1.3. Power Supply Network
When the EVB is used in its simplest configuration,
SW1 can be set to USB POWER and powered via the
USB connector, J1, or to EXT POWER and powered via
the ac connector J7 and included transformer. No
additional configuration is required beyond selecting the
position of SW1.
J7 is a 2.1 mm power jack for use with standard
transformer power bricks. The power brick must be dc
and provide at least 5 V on the inner conductor. The
regulators on the baseboard are capable of handling up
to 26 V, so most dc power bricks are acceptable. To
power the board via J7, SW1 must be in the EXT
POWER position and no power should be applied via
J4. This configuration is convenient when using the
JTAG header to program custom code into the
C8051F320.
For additional flexibility in usage and testing, the
baseboard can accept power from up to 3 independent
power supplies via connector J4. When connecting one
or more power supplies to connector J4, care must be
taken not to supply power via J1 (USB POWER) or J7
(EXT POWER). When connecting more than one power
supply to connector J4, care must be taken to configure
R1, R2, and R4. See the Figure 2 for reference.
J4 provides flexibility for varying the 3 separate supplies
on the board: VRADIO, VAUDIO, and VIO/VMCU.
VRADIO is applied to the VA and VD pins of the
Si4700/01/02/03, VAUDIO powers the audio amplifier
network, and VIO/VMCU powers the baseboard
microcontroller, the reference clock system, and VIO on
the Si4700/01/02/03. Prior to using J4 it is necessary to
remove R1, R2, and R4 as these resistors short the
three connections on J4 together.
When supplying VIO/VMCU via the J4 connector, a
supply > 5 V may be used in conjunction with the 3.3 V
LDO regulator U2. However, U2 may be bypassed by
depopulating U2 and populating R30 with a 0
resistor.
In this case, the VMCU/VIO supply at J4 must lie
between 3.0 and 3.6 V.
This condition is necessary to
ensure reliable operation of the C8051F320.
When supplying VRADIO via the J4 connector, a supply
> 5 V may be used in conjunction with the 3.3 V LDO
regulator U3. However, U3 may be bypassed by
depopulating R14 and populating R25 with a 0
resistor. In such a case, the VRADIO supply at J4 must
lie between 2.7 and 5.5 V.
These are the
recommended operating conditions for the
Si4700/01/02/03.
Rev. 0.9
5
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