74AHC1G07; 74AHCT1G07
Buffer with open-drain output
Rev. 7 — 18 November 2014
Product data sheet
1. General description
74AHC1G07 and 74AHCT1G07 are high-speed Si-gate CMOS devices. They provide a
non-inverting buffer.
The output of these devices is open-drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. For
digital operation this device must have a pull-up resistor to establish a logic HIGH-level.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features and benefits
High noise immunity
Low power dissipation
SOT353-1 and SOT753 package options
ESD protection:
HBM JESD22-A114E: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
Specified from
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AHC1G07GW
74AHCT1G07GW
74AHC1G07GV
74AHCT1G07GV
40 C
to +125
C
SC-74A
40 C
to +125
C
Name
TSSOP5
Description
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
plastic surface-mounted package; 5 leads
Version
SOT353-1
SOT753
Type number
NXP Semiconductors
74AHC1G07; 74AHCT1G07
Buffer with open-drain output
4. Marking
Table 2.
Marking codes
Marking
[1]
AS
A07
CS
C07
Type number
74AHC1G07GW
74AHC1G07GV
74AHCT1G07GW
74AHCT1G07GV
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram
6. Pinning information
6.1 Pinning
Fig 4.
Pin configuration
6.2 Pin description
Table 3.
Symbol
n.c.
A
GND
Y
V
CC
Pin description
Pin
1
2
3
4
5
Description
not connected
data input
ground (0 V)
data output
supply voltage
74AHC_AHCT1G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 7 — 18 November 2014
2 of 12
NXP Semiconductors
74AHC1G07; 74AHCT1G07
Buffer with open-drain output
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state
Input
A
L
H
Output
Y
L
Z
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CC
V
I
I
IK
I
OK
I
O
V
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
output voltage
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
0.5
0.5
Max
+7.0
+7.0
-
20
25
+7.0
+7.0
75
-
+150
250
Unit
V
V
mA
mA
mA
V
V
mA
mA
C
mW
V
I
<
0.5
V
V
O
<
0.5
V
V
O
>
0.5
V
active mode
high-impedance mode
[1]
[1]
[1]
20
-
-
0.5
0.5
-
75
65
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For both TSSOP5 and SC-74A packages: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
V
CC
= 3.3 V
0.3 V
V
CC
= 5.0 V
0.5 V
active mode
high-impedance mode
Conditions
Min
2.0
0
0
0
40
-
-
74AHC1G07
Typ
5.0
-
-
-
+25
-
-
Max
5.5
5.5
V
CC
6.0
+125
100
20
4.5
0
0
0
40
-
-
74AHCT1G07
Min
Typ
5.0
-
-
-
+25
-
-
Max
5.5
5.5
V
CC
6.0
+125
-
20
V
V
V
V
C
ns/V
ns/V
Unit
74AHC_AHCT1G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 7 — 18 November 2014
3 of 12
NXP Semiconductors
74AHC1G07; 74AHCT1G07
Buffer with open-drain output
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
For type 74AHC1G07
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 5.5 V
V
OL
LOW-level
V
I
= V
IH
or V
IL
output voltage
I
O
= 50
A;
V
CC
= 2.0 V
I
O
= 50
A;
V
CC
= 3.0 V
I
O
= 50
A;
V
CC
= 4.5 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
O
= 8.0 mA; V
CC
= 4.5 V
I
I
I
OZ
I
CC
C
I
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
1.5
2.1
3.85
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
0
0
-
-
-
-
-
1.5
-
-
-
0.5
0.9
1.65
0.1
0.1
0.1
0.36
0.36
0.1
0.25
1.0
10
-
-
1.5
2.1
3.85
-
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
0.1
0.1
0.1
0.44
0.44
1.0
2.5
10
10
-
-
1.5
2.1
3.85
-
-
-
-
-
-
-
-
-
-
-
-
0.5
0.9
1.65
0.1
0.1
0.1
0.55
0.55
2.0
10.0
20
10
V
V
V
V
V
V
V
V
V
V
V
A
A
A
pF
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
OFF-state
V
I
= V
IH
or V
IL
; V
O
= V
CC
or
output current GND; V
CC
= 5.5 V
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
input
capacitance
HIGH-level
input voltage
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
For type 74AHCT1G07
V
IH
V
IL
V
OL
2.0
-
-
-
-
0.8
2.0
-
-
0.8
2.0
-
-
0.8
V
V
LOW-level
V
I
= V
IH
or V
IL
; V
CC
= 4.5 V
output voltage
I
O
= 50
A
I
O
= 8.0 mA
input leakage
current
V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
-
-
-
-
-
-
0
-
-
-
-
-
0.1
0.36
0.1
0.25
1.0
1.35
-
-
-
0.1
0.44
1.0
2.5
-
-
-
0.1
0.55
2.0
10.0
V
V
A
A
A
mA
I
I
I
OZ
I
CC
I
CC
OFF-state
V
I
= V
IH
or V
IL
; V
O
= V
CC
or
output current GND; V
CC
= 5.5 V
supply current V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
additional
per input pin; V
I
= 3.4 V;
supply current other inputs at V
CC
or GND;
I
O
= 0 A; V
CC
= 5.5 V
input
capacitance
-
-
10
1.5
-
-
20
1.5
C
I
-
1.5
10
-
10
-
10
pF
74AHC_AHCT1G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 7 — 18 November 2014
4 of 12
NXP Semiconductors
74AHC1G07; 74AHCT1G07
Buffer with open-drain output
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; t
r
= t
f
=
3.0 ns. For test circuit see
Figure 6.
Symbol
Parameter
Conditions
Min
For type 74AHC1G07
t
PZL
OFF-state
to LOW
propagation
delay
A to Y; see
Figure 5
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF
C
L
= 50 pF
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF
C
L
= 50 pF
t
PLZ
LOW to
OFF-state
propagation
delay
A to Y; see
Figure 5
V
CC
= 3.0 V to 3.6 V
C
L
= 15 pF
C
L
= 50 pF
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF
C
L
= 50 pF
C
PD
power
dissipation
capacitance
OFF-state
to LOW
propagation
delay
LOW to
OFF-state
propagation
delay
power
dissipation
capacitance
per buffer;
C
L
= 50 pF; f = 1 MHz;
V
I
= GND to V
CC
A to Y; see
Figure 5
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF
C
L
= 50 pF
t
PLZ
A to Y; see
Figure 5
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF
C
L
= 50 pF
C
PD
per buffer;
C
L
= 50 pF; f = 1 MHz;
V
I
= GND to V
CC
[3]
[2]
[2]
[3]
[2]
[1]
[2]
[1]
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
-
-
-
-
3.5
5.0
2.5
3.6
5.6
8.0
3.9
5.5
1.0
1.0
1.0
1.0
6.3
9.0
4.6
6.5
1.0
1.0
1.0
1.0
7.0
10.0
4.9
7.0
ns
ns
ns
ns
-
-
-
-
-
5.8
8.3
4.2
6.0
5
7.9
11.5
5.1
7.5
-
1.0
1.0
1.0
1.0
-
8.4
12.0
5.6
8.0
-
1.0
1.0
1.0
1.0
-
8.9
12.5
6.1
8.5
-
ns
ns
ns
ns
pF
For type 74AHCT1G07
t
PZL
-
-
2.8
4.0
4.6
6.5
1.0
1.0
5.3
7.5
1.0
1.0
5.6
8.0
ns
ns
-
-
-
3.9
5.5
6.5
5.6
8.0
-
1.0
1.0
-
6.1
8.5
-
1.0
1.0
-
6.6
9.0
-
ns
ns
pF
[1]
[2]
[3]
Typical values are measured at V
CC
= 3.3 V.
Typical values are measured at V
CC
= 5.0 V.
C
PD
is used to determine the dynamic power dissipation P
D
(W).
P
D
= C
PD
V
CC2
f
i
+
(C
L
V
CC2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts
74AHC_AHCT1G07
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 7 — 18 November 2014
5 of 12
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