(2) Switching characteristics are independent of operating junction temperature.
I
S
I
SM
V
SD
−
−
−
−
−
−
1.0
5.0
1.2
A
A
V
(V
DD
= 10 Vdc, I
D
= 1.0 A,
V
GEN
= 10 V, R
L
= 10
Ω)
t
d(on)
t
r
t
d(off)
t
f
Q
T
−
−
−
−
−
8.0
24
36
10
−
20
40
60
20
−
nC
ns
(V
DS
= 5.0 V)
(V
DS
= 5.0 V)
(V
DG
= 5.0 V)
C
iss
C
oss
C
rss
−
−
−
90
50
10
−
−
−
pF
V
GS(th)
r
DS(on)
Vdc
0.6
−
−
−
0.058
0.072
−
Ohms
0.070
0.095
V
(BR)DSS
I
DSS
Vdc
20
−
−
−
−
−
−
−
−
1.0
5.0
±100
μAdc
Symbol
Min
Typ
Max
Unit
I
GSS
nAdc
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2
MGSF3442XT1
INFORMATION FOR USING THE TSOP−6 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
0.094
2.4
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.074
1.9
0.037
0.95
0.028
0.7
0.039
1.0
inches
mm
TSOP−6
TSOP−6 POWER DISSIPATION
The power dissipation of the TSOP−6 is a function of the
drain pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power
dissipation. Power dissipation for a surface mount device is
determined by T
J(max)
, the maximum rated junction
temperature of the die, R
θJA
, the thermal resistance from
the device junction to ambient, and the operating
temperature, T
A
. Using the values provided on the data
sheet for the TSOP−6 package, P
D
can be calculated as
follows:
P
D
=
T
J(max)
−
T
A
R
θJA
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•
Always preheat the device.
•
The delta temperature between the preheat and
soldering should be 100°C or less.*
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
•
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
•
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
•
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
•
Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature T
A
of 25°C,
one can calculate the power dissipation of the device which
in this case is 400 milliwatts.
P
D
=
150°C
−
25°C
300°C/W
= 400 milliwatts
The 300°C/W for the TSOP−6 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 400
milliwatts. There are other alternatives to achieving higher
power dissipation from the TSOP−6 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad™. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the
same footprint.
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3
MGSF3442XT1
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE V
D
H
6
5
4
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
DIM
A
A1
b
c
D
E
E1
e
L
L2
M
MIN
0.90
0.01
0.25
0.10
2.90
2.50
1.30
0.85
0.20
0°
MILLIMETERS
NOM
MAX
1.00
1.10
0.06
0.10
0.38
0.50
0.18
0.26
3.00
3.10
2.75
3.00
1.50
1.70
0.95
1.05
0.40
0.60
0.25 BSC
10°
−
L2
E
GAUGE
PLANE
NOTE 5
0.05
A1
Thermal Clad is a trademark of the Bergquist Company.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone:
303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax:
303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email:
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USA/Canada
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ON Semiconductor Website: www.onsemi.com
Order Literature:
http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
ÉÉÉ
ÉÉÉ
1
2
E1
3
L
b
M
C
e
DETAIL Z
SEATING
PLANE
A
c
DETAIL Z
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
RECOMMENDED
SOLDERING FOOTPRINT*
0.60
6X
3.20
0.95
6X
0.95
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
DSP 与 ARM 处理器
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