AN1313
APPLICATION NOTE
Porting an application from the ST10F168 to the ST10F269
By Charles AUBENAS
1 - INTRODUCTION
The ST10F269 is a new derivative of the STMicroelectronics ST10 family of 16-bit single-chip CMOS
micro-controllers. It is upward compatible with the ST10F168.
The goal of this document is to enlighten the differences between the ST10F269 and ST10F168 and is
intended for hardware or software designers who are adapting an existing application based on the
ST10F168 to the ST10F269.
This document will present the modified functionalities of the ST10F269, then the new ones before
looking at the modified and the new registers. For each part, the differences with the ST10F168 that may
be impacting will be stressed and some advice on the way they can be handled will be given.
September 2013
DocID7589 Rev 2
1/16
AN1313 - APPLICATION NOTE
TABLE CONTENTS
1
2
2.1
2.1.1
2.1.1.1
2.1.1.2
2.1.2
2.1.2.1
2.1.2.2
2.2
2.2.1
2.2.2
2.3
2.3.1
2.3.2
2.4
2.4.1
2.4.2
3
3.1
3.1.1
3.1.2
3.2
3.2.1
3.2.2
3.3
3.3.1
3.3.2
4
4.1
4.1.1
4.1.2
4.2
4.2.1
4.2.2
5
5.1
5.1.1
5.1.1.1
5.1.1.2
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INTRODUCTION .........................................................................................................
MODIFIED FUNCTIONALITIES..................................................................................
PIN OUT ......................................................................................................................
Pin 84 ..........................................................................................................................
Hardware Impact .........................................................................................................
Software Impact...........................................................................................................
Pins 17 and 56.............................................................................................................
Hardware Impact .........................................................................................................
Software Impact...........................................................................................................
XRAM ..........................................................................................................................
Hardware Impact .........................................................................................................
Software Impacts.........................................................................................................
FLASH EEPROM ........................................................................................................
Hardware Impacts .......................................................................................................
Software Impacts.........................................................................................................
A/D CONVERTER .......................................................................................................
Hardware Impacts .......................................................................................................
Software Impacts.........................................................................................................
NEW FUNCTIONNALITIES ........................................................................................
CAN MODULES ..........................................................................................................
Hardware Impacts .......................................................................................................
Software Impacts.........................................................................................................
REAL TIME CLOCK ....................................................................................................
Hardware Impacts .......................................................................................................
Software Impacts.........................................................................................................
MAC UNIT ...................................................................................................................
Hardware Impacts .......................................................................................................
Software Impacts.........................................................................................................
MODIFIED REGISTERS .............................................................................................
PICON REGISTER ......................................................................................................
Hardware Impacts .......................................................................................................
Software Impacts.........................................................................................................
WDTCON REGISTER .................................................................................................
Hardware Impacts .......................................................................................................
Software Impacts.........................................................................................................
NEW REGISTERS ......................................................................................................
NEW REGISTERS IMPACTING THE APPLICATION ................................................
XPERCON Register ....................................................................................................
Hardware Impacts .......................................................................................................
Software Impacts.........................................................................................................
AN1313 - APPLICATION NOTE
5.1.2
5.1.2.1
5.1.2.2
5.2
5.2.1
5.2.2
6
6.1
6.1.1
6.1.2
6.1.2.1
6.1.2.2
6.1.2.3
6.2
6.2.1
6.2.2
7
POCONx Registers .....................................................................................................
Hardware Impacts .......................................................................................................
Software Impacts.........................................................................................................
NEW REGISTERS NOT IMPACTING THE APPLICATION ........................................
ODP4 Register (F1CA
h
/ E5
h
) ......................................................................................
EXISEL Register (F1DA
h
/ DA
h
)...................................................................................
ELECTRICAL CHARACTERISTICS ..........................................................................
DC CHARACTERISTICS ............................................................................................
Absolute Maximum Ratings.........................................................................................
DC Characteristics.......................................................................................................
Operating Voltage........................................................................................................
Programming Voltage ..................................................................................................
Miscellaneous ...........................................................................................................
AC CHARACTERISTICS AT 25MHZ ..........................................................................
Hardware Impact .........................................................................................................
Software Impact...........................................................................................................
REFERENCES ............................................................................................................
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AN1313 - APPLICATION NOTE
2 - MODIFIED FUNCTIONALITIES
2.1 - Pin Out
2.1.1 - Pin 84
This pin was named Vpp/RPD on the ST10F168 and was the 12V input pin for Flash programming. In the
ST10F269, it is now only used as RPD as the Flash is a single voltage one.
2.1.1.1 - Hardware Impact
This pin is no longer designed to accept 12V inputs. Its ratings are the same as any other pin: -0.5V to
VDD +0.5V.
2.1.1.2 - Software Impact
None.
Note: Some applications migth be using the Vpp pin as a protection for Flash programming by software
controlling the 12V charge pump. The ST10F269 being now a single voltage Flash, Vpp will
appear as permanently “ON” and thus such a protection can not be reproduced with the
ST10F269.
2.1.2 - Pins 17 and 56
For the ST10F168, these are V
DD
pins connected to 5Volts.
For the ST10F269, these pins 17 and 56 are de-coupling pins for the 3,3V and respectively named DC2
and DC1. A de-coupling capacitor must be connected to these pins and the nearest V
SS
.
2.1.2.1 - Hardware Impact
The application board should be re-designed in order to introduce the decoupling capacitors.
2.1.2.2 - Software Impact
None.
2.2 - XRAM
The ST10F168 has only 6KBytes of extension RAM while the ST10F269 has 10KBytes.
The XRAM address range in the ST10F168 is 00’D000h - 00’E7FFh and is enabled if XPEN (bit 2 of
SYSCON register) is set.
The XRAM of the ST10F269 is divided into 2 ranges named XRAM1 of 2KBytes and XRAM2 of 8KBytes:
– The
XRAM1
address range is 00’E000h - 00’E7FFh if enabled (XPEN set -bit 2 of SYSCON register-
AND
XRAM1EN set - bit 2 of XPERCON register-).
– The
XRAM2
address range is 00’C000h - 00’DFFFh if enabled (XPEN set -bit 2 of SYSCON register-
AND
XRAM2EN set - bit 3 of XPERCON register-).
2.2.1 - Hardware Impact
None.
2.2.2 - Software Impacts
The memory mapping of the application may be impacted by the difference in XRAM size or by the
separation in 2 ranges independently selectable.
In the ST10F168, setting XPEN bit in SYSCON register enables the XRAM.
In the ST10F269, setting XPEN bit in SYSCON register enables the XRAM1 only (default reset
configuration of the new XPERCON register). Thus accesses to the range 00’D000h - 00’DFFFh that was
part of the ST10F168 XRAM will be redirected to external memory.
Three configurations may be seen:
1. Configuration 1: no external memory in address range 00’C000h - 00’CFFFh.
Impact: one register to configure.
Work-around: Set the bit XRAM2EN of XPERCON new register. It enables the second XRAM range.
The total XRAM range is then 00’C000h - 00’E7FFh which includes the ST10F168 range.
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AN1313 - APPLICATION NOTE
2. Configuration 2: external memory exists in page 3 and is below 2K Byte size.
Impact: one register to configure, the external memory has to be remapped within page 3.
Work-around: Set the bit XRAM2EN and clear the bit XRAM1EN of XPERCON new register. Then
remap your variables to uses the XRAM2 range as your XRAM (bigger than the ST10F168 so no
issue) and remap your 2K Byte range of external memory at the XRAM1 location. This way you keep
everything within page 3.
3. Configuration 3: external memory exists in page 3 and is above 2K Byte size.
Impact: one register to configure, the external memory to be remapped in another page.
Work-around: Set the bit XRAM2EN of the XPERCON new register and relocate your external
memory in page 2 (address range 0x8000 - 0xBFFF) if possible. Then change the link directives
according to the new mapping.
Note:
The setting of the bits in XPERCON must be done
before
enabling the XBus Peripherals by the
XPEN bit of SYSCON.
2.3 - Flash EEPROM
The ST10F168 and the ST10F269 don’t have the same Flash memories. The embedded Flash of the
ST10F269 has a technology really similar to the stand-alone Flash memories of STMicroelectronics.
Table 1 :
Flash Memories Key Characteristics
ST10F168
Flash Size
Flash Organization
Programming voltage
Programming method
Program/Erase cycles
256K Bytes
4 banks
12 Volts
STEAK
TM
10 000, 20 years of data retention
256K Bytes
7 blocks
5 Volts
Write/Erase Controller
100.000,
≥
10 years of data retention
ST10F269
2.3.1 - Hardware Impacts
The 12 Volts input on pin 84 is no longer needed.
2.3.2 - Software Impacts
The mapping of the application and the programming and erasing routines are impacted.
ST10F168 bank 0: this range is fully compatible with the block 0 of the ST10F269.
ST10F168 bank 1: this range is now covered by the blocks 1, 2 and 3 of the ST10F269. It is not
mandatory to re-map Code and Data: these 3 blocks could be considered as a single range.
ST10F168 bank 2 and bank 3: The highest third of bank 2 and the lowest third of bank 3 correspond to
the block 5 of the ST10F269. Code and Data have to be remapped to take care of this separation in three
ranges of 64K Bytes if these banks were likely to be independently reprogrammed.
The programming-erasing software must also be rewritten as the ST10F269 does not work with the
STEAK
TM
but with a Write/Erase Controller.
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