TSM2N60S
Taiwan Semiconductor
N-Channel Power MOSFET
600V, 0.6A, 5Ω
FEATURES
●
●
●
●
Robust high voltage termination
Avalanche energy specified
Diode is characterized for use in bridge circuits
Source to Drain diode recovery time comparable to a
discrete fast recovery diode.
KEY PERFORMANCE PARAMETERS
PARAMETER
V
DS
R
DS(on)
(max)
Q
g
VALUE
600
5
13
UNIT
V
Ω
nC
APPLICATION
●
●
●
Power Supply
Lighting
Charger
SOT-223
Notes:
Moisture sensitivity level: level 3. Per J-STD-020
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
(Note 1)
SYMBOL
V
DS
V
GS
T
C
= 25°C
T
C
= 100°C
I
D
I
DM
P
DTOT
T
J
T
J
, T
STG
LIMIT
600
±30
0.6
0.36
1.5
2.5
150
- 55 to +150
UNIT
V
V
A
A
W
°C
°C
(Note 2)
Total Power Dissipation @ T
C
= 25°C
Operating Junction Temperature
Operating Junction and Storage Temperature Range
THERMAL PERFORMANCE
PARAMETER
Junction to Case Thermal Resistance
Junction to Ambient Thermal Resistance
SYMBOL
R
ӨJC
R
ӨJA
LIMIT
15
55.8
UNIT
°C/W
°C/W
Notes:
R
ӨJA
is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined
at the solder mounting surface of the drain pins. R
ӨJA
is guaranteed by design while R
ӨCA
is determined by the user’s board
design. R
ӨJA
shown below for single device operation on FR-4 PCB in still air
Document Number: DS_P0000066
1
Version: B15
TSM2N60S
Taiwan Semiconductor
ELECTRICAL SPECIFICATIONS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Static
(Note 3)
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNIT
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
(Note 4)
V
GS
= 0V, I
D
= 250µA
V
DS
= V
GS
, I
D
= 250µA
V
GS
=±30V, V
DS
=0V
V
DS
=600V, V
GS
=0V
V
GS
=10V, I
D
=0.6A
V
DS
= 10V, I
D
= 0.2A
BV
DSS
V
GS(TH)
I
GSS
I
DSS
R
DS(ON)
g
fs
Q
g
600
2
--
--
--
--
--
--
--
--
3.6
0.8
--
4
±100
1
5
--
V
V
nA
µA
Ω
S
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
(Note 5)
--
--
--
--
--
--
13
2
6
435
56
9.2
--
--
--
--
--
--
pF
nC
V
DS
=400V, I
D
=0.6A,
V
GS
= 10V
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
V
DS
=25V, V
GS
=0V,
f =1.0MHz
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Source-Drain Diode
Forward On Voltage
Notes:
1.
2.
3.
4.
5.
Current limited by package
Pulse width limited by the maximum junction temperature
Pulse test: PW ≤ 300µs, duty cycle ≤ 2%
For DESIGN AID ONLY, not subject to production testing.
Switching time is essentially independent of operating temperature.
(Note 3)
--
--
--
--
12
21
30
24
--
--
--
--
ns
V
GS
=10V, I
D
=0.6A,
V
DD
=300V, R
G
=18Ω,
t
r
t
d(off)
t
f
I
S
= 8A, V
GS
= 0V
V
SD
--
0.85
1.15
V
Document Number: DS_P0000066
2
Version: B15
TSM2N60S
Taiwan Semiconductor
ORDERING INFORMATION
PART NO.
TSM2N60SCW RPG
PACKAGE
SOT-223
PACKING
2,500pcs / 13” Reel
Note:
1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC
2. Halogen-free according to IEC 61249-2-21 definition
Document Number: DS_P0000066
3
Version: B15
TSM2N60S
Taiwan Semiconductor
CHARACTERISTICS CURVES
(T
C
= 25°C unless otherwise noted)
Output Characteristics
Transfer Characteristics
On-Resistance vs. Drain Current
Gate Charge
On-Resistance vs. Junction Temperature
Source-Drain Diode Forward Voltage
Document Number: DS_P0000066
4
Version: B15
TSM2N60S
Taiwan Semiconductor
CHARACTERISTICS CURVES
(Tc = 25°C unless otherwise noted)
On-Resistance vs. Gate-Source Voltage
Threshold Voltage
Maximum Safe Operating Area
Normalized Thermal Transient Impedance, Junction-to-Ambient
Document Number: DS_P0000066
5
Version: B15
FPGA/CPLD
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