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LTC2144-14_15

产品描述14-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs
文件大小658KB,共38页
制造商Linear ( ADI )
官网地址http://www.analog.com/cn/index.html
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LTC2144-14_15概述

14-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs

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LTC2145-14/
LTC2144-14/LTC2143-14
14-Bit, 125Msps/105Msps/
80Msps Low Power Dual ADCs
FEATURES
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DESCRIPTION
The LTC
®
2145-14/LTC2144-14/LTC2143-14 are 2-channel
simultaneous sampling 14-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 73.1dB SNR and
90dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.08ps
RMS
allows undersampling of IF frequencies with
excellent noise performance.
DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ)
and no missing codes over temperature. The transition
noise is 1.2LSB
RMS
.
The digital outputs can be either full rate CMOS, double
data rate CMOS, or double data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC
+
and ENC
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Two-Channel Simultaneously Sampling ADC
73.1dB SNR
90dB SFDR
Low Power: 189mW/149mW/113mW Total
95mW/75mW/57mW per Channel
Single 1.8V Supply
CMOS, DDR CMOS, or DDR LVDS Outputs
Selectable Input Ranges: 1V
P-P
to 2V
P-P
750MHz Full Power Bandwidth S/H
Optional Data Output Randomizer
Optional Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Serial SPI Port for Configuration
64-Pin (9mm × 9mm) QFN Package
APPLICATIONS
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Communications
Cellular Base Stations
Software Defined Radios
Portable Medical Imaging
Multi-Channel Data Acquisition
Nondestructive Testing
TYPICAL APPLICATION
1.8V
V
DD
1.8V
OV
DD
64k Point 2-Tone FFT, f
IN
= 69MHz,
70MHz, –1dBFS, 125Msps
0
–10
AMPLITUDE (dBFS)
CH 1
ANALOG
INPUT
S/H
14-BIT
ADC CORE
D1_13
CMOS,
DDR CMOS
OR DDR LVDS
OUTPUTS
–20
–30
–40
–50
–60
–70
–80
D1_0
D2_13
CH 2
ANALOG
INPUT
S/H
14-BIT
ADC CORE
OUTPUT
DRIVERS
D2_0
–90
–100
–110
–120
0
10
20
30
40
FREQUENCY (MHz)
50
60
21454314 TA03b
125MHz
CLOCK
GND
CLOCK
CONTROL
21454314 TA01a
OGND
21454314fa
1

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