MGA-30689
40MHz - 3000MHz
Flat Gain High Linearity Gain Block
Data Sheet
Description
Avago Technologies’ MGA-30689 is a flat gain, high
linearity, low noise, 22dBm Gain Block with good OIP3
achieved through the use of Avago Technologies’ propri-
etary 0.25um GaAs Enhancement-mode pHEMT process.
The device required simple dc biasing components to
achieve wide bandwidth performance. The tempera-
ture compensated internal bias circuit provides stable
current over temperature and process threshold voltage
variation.
The MGA-30689 is housed inside a standard SOT89
package (4.5 x 4.1 x 1.5 mm).
Features
•
•
•
•
•
•
•
•
•
•
Flat Gain 14dB +/-0.5dB, 40MHz to 2600MHz
High linearity
Built in temperature compensated internal bias circuitry
No RF matching components required
GaAs E-pHEMT Technology
[1]
Standard SOT89 package
Single, Fixed 5V supply
Excellent uniformity in product specifications
MSL-2 and Lead-free halogen free
High MTTF for base station application
Applications
•
IF amplifier, RF driver amplifier
•
General purpose gain block
Specifications
•
900MHz; 5V, 104mA (typical)
– 14.3 dB Gain
– 43 dBm Output IP3
– 3.0 dB Noise Figure
– 22.3 dBm Output Power at 1dB gain compression
•
1950MHz, 5V, 104mA (typical)
– 14.6 dB Gain
– 40 dBm Output IP3
– 3.3 dB Noise Figure
– 22.5 dBm Output Power at 1dB gain compression
#3
RFout
#3
#2
RFout
GND
#1
RFin
Note:
1. Enhancement mode technology employs positive gate voltage,
thereby eliminating the need of negative gate voltage associated
with conventional depletion mode devices.
Component Image
6GX
#1
#2
RFin
GND
Top View
Bottom View
Notes:
Package marking provides orientation and identification
“6G” = Device Code
“X” = Month of manufacture
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 75 V
ESD Human Body Model = 450 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
Absolute Maximum Rating
[2]
T
A
=25
°C
Symbol
V
dd,max
P
in,max
P
diss
T
j, max
T
STG
Parameter
Device Voltage, RF output to ground
CW RF Input Power
Total Power Dissipation
[4]
Junction Temperature
Storage Temperature
Units
V
dBm
W
°C
°C
Absolute Max.
5.5
20
0.75
150
-65 to 150
Thermal Resistance
[3]
θ
jc
= 53.5°C/W
(Vdd = 5V, Ids = 100mA, Tc = 85°C)
Notes:
2. Operation of this device in excess
of any of these limits may cause
permanent damage.
3. Thermal resistance measured using
Infrared measurement technique.
4. This is limited by maximum Vdd and
Ids. Derate 18.7 mW/°C for Tc>110°C.
Product Consistency Distribution Charts
[5, 6]
LSL
USL
LSL
USL
80
90
100
110
120
13.5
14
14.5
15
15.5
16
16.5
Figure 1. Ids, LSL=80mA , nominal=104mA, USL=125mA
Figure 2. Gain, LSL=13.7dB, nominal=14.6dB, USL=16.7dB
LSL
LSL
37
38
39
40
41
42
43
44
45
21.2
21.6
22
22.4
22.8
23.2
Figure 3. OIP3, LSL=37.5dBm, nominal=41.5dBm
Figure 4. P1dB, LSL=21.2dBm, nominal=22.5dBm
USL
Notes:
5. Distribution data sample size is 500 samples taken from 3 different
wafer lots and 6 different wafers. Future wafers allocated to this
product may have nominal values anywhere between the upper and
lower limits.
6. Measurements were made on a characterization test board, which
represents a trade-off between optimal OIP3, gain and P1dB. Circuit
trace losses have not been de-embedded from measurements
above.
2.8
3
3.2
3.4
3.6
3.8
4
Figure 5. NF, nominal=3.23dB, USL=4dB
2
Electrical Specifications
[7]
T
A
= 25°C, Vdd =5V
Symbol
Ids
Gain
Parameter and Test Condition
Quiescent current
Gain
Frequency
N/A
40MHz
900MHz
1950MHz
40MHz
900MHz
1950MHz
40MHz
900MHz
1950MHz
40MHz
900MHz
1950MHz
40MHz
900MHz
1950MHz
40MHz
900MHz
1950MHz
40MHz
900MHz
1950MHz
Units
mA
dB
Min.
80
Typ.
104
14.8
14.3
14.6
40
43
40
2.9
3.0
3.3
-13
-12
-15
-18
-15
-12
-20
-22
-25
21.8
22.4
22.5
Max.
125
13.7
dBm
37.5
dB
–
dB
16.7
OIP3
[8]
Output Third Order Intercept Point
–
NF
Noise Figure
4
S11
Input Return Loss, 50Ω source
S22
Output Return Loss, 50Ω load
dB
S12
Reverse Isolation
dB
OP1dB
Output Power at 1dB Gain Compression
dBm
21.2
–
Notes:
7. Measurements obtained using demo board described in Figure 30 and 31. 40MHz data was taken with 40MHz – 2GHz Application Test Circuit,
900MHz data with 0.2GHz – 3GHz Application Test Circuit and 1.95GHz data with 1.5GHz – 2.6GHz Application Test Circuit respectively.
8. OIP3 test condition: F
RF1
– F
RF2
= 10MHz with input power of -15dBm per tone measured at worse side band.
9. Use proper bias, heat sink and de-rating to ensure maximum channel temperature is not exceeded. See absolute maximum ratings and application
note (if applicable) for more details.
3
Typical Performance (40MHz – 2GHz)
TA = +25°C, Vdd = 5V, Input Signal = CW. Application Test Circuit is shown in Figure 30 and Table 1.
120
110
Gain (dB)
Ids (mA)
100
90
80
16
15.5
15
14.5
14
13.5
13
12.5
-40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90
Temperature (°C)
12
0.0
0.2
0.4 0.6
0.8 1.0 1.2 1.4
Frequency (GHz)
85°C
25°C
-40°C
1.6 1.8
2.0
Figure 6. Ids over Temperature
Figure 7. Gain over Frequency and Temperature
48
46
44
42
OIP3 (dBm)
40
38
36
34
32
30
0.0
0.2
0.4
0.6
0.8 1.0 1.2
Frequency (GHz)
1.4
1.6
85°C
25°C
-40°C
1.8
2.0
P1dB(dBm)
25
24
23
22
21
20
19
18
17
16
0.0
0.2
0.4 0.6
0.8 1.0 1.2 1.4
Frequency (GHz)
1.6
85°C
25°C
-40°C
1.8
2.0
Figure 8. OIP3 over Frequency and Temperature
Figure 9. P1dB over Frequency and Temperature
4
Typical Performance (40MHz – 2GHz)
TA = +25°C, Vdd = 5V, Input Signal = CW. Application Test Circuit is shown in Figure 30 and Table 1.
0
-5
-10
S11 (dB)
S22 (dB)
0
85°C
25°C
-40°C
-5
-10
-15
-20
-25
0.0
0.2
0.4
0.6
0.8 1.0 1.2 1.4
Frequency (GHz)
1.6
1.8
2.0
-30
0.0
0.2
0.4
0.6
0.8 1.0 1.2 1.4
Frequency (GHz)
1.6
1.8
2.0
85°C
25°C
-40°C
-15
-20
-25
-30
Figure 10. S11 over Frequency and Temperature
Figure 11. S22 over Frequency and Temperature
-18
-19
-20
-21
S12 (dB)
NF(dB)
-22
-23
-24
-25
-26
-27
0.0
0.2
0.4
0.6
0.8 1.0 1.2 1.4
Frequency (GHz)
1.6
1.8
2.0
85°C
25°C
-40°C
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
0.0
0.2
0.4
0.6
0.8 1.0 1.2 1.4
Frequency (GHz)
1.6
1.8
2.0
85°C
25°C
-40°C
Figure 12. S12 over Frequency and Temperature
Figure 13. Noise Figure over Frequency and Temperature
5
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