MUN5333DW1,
NSBC143ZPDXV6,
NSBC143ZPDP6
Complementary Bias
Resistor Transistors
R1 = 4.7 kW, R2 = 47 kW
NPN and PNP Transistors with Monolithic
Bias Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
(3)
R
1
Q
1
Q
2
R
2
R
1
(5)
(6)
www.onsemi.com
PIN CONNECTIONS
(2)
(1)
R
2
(4)
•
•
•
•
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
•
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25°C both polarities Q
1
(PNP) & Q
2
(NPN), unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current − Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
30
5
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
MARKING DIAGRAMS
6
SOT−363
CASE 419B
1
33 M
G
G
SOT−563
CASE 463A
1
33 M
G
G
SOT−963
CASE 527AD
1
33/Y
M
G
M
G
G
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
= Specific Device Code
= Date Code*
= Pb-Free Package
(Note: Microdot may be in either location)
Y
ORDERING INFORMATION
Device
MUN5333DW1T1G,
NSVMUN5333DW1T1G
NSVMUN5333DW1T3G
NSBC143ZPDXV6T1G
NSVB143ZPDXV6T1G
NSBC143ZPDP6T5G
Package
SOT−363
SOT−363
SOT−563
SOT−963
Shipping
†
3,000/Tape & Reel
10,000/Tape & Reel
4,000/Tape & Reel
8,000/Tape & Reel
*Date Code orientation may vary depending up-
on manufacturing location.
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2015
1
January, 2015 − Rev. 2
Publication Order Number:
DTC143ZP/D
MUN5333DW1, NSBC143ZPDXV6, NSBC143ZPDP6
THERMAL CHARACTERISTICS
Characteristic
MUN5333DW1 (SOT−363) ONE JUNCTION HEATED
Total Device Dissipation
T
A
= 25°C
(Note 1)
(Note 2)
Derate above 25°C
(Note 1)
(Note 2)
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
P
D
187
256
1.5
2.0
R
qJA
670
490
mW
mW/°C
°C/W
Symbol
Max
Unit
MUN5333DW1 (SOT−363) BOTH JUNCTION HEATED
(Note 3)
Total Device Dissipation
(Note 1)
T
A
= 25°C
(Note 2)
Derate above 25°C
(Note 1)
(Note 2)
Thermal Resistance,
Junction to Ambient
(Note 2)
Thermal Resistance,
Junction to Lead (Note 1)
(Note 2)
Junction and Storage Temperature Range
NSBC143ZPDXV6 (SOT−563) ONE JUNCTION HEATED
Total Device Dissipation
(Note 1)
T
A
= 25°C
Derate above 25°C
(Note 1)
Thermal Resistance,
Junction to Ambient
(Note 1)
P
D
357
2.9
R
qJA
350
mW
mW/°C
°C/W
(Note 1)
P
D
250
385
2.0
3.0
R
qJA
493
325
°C/W
188
208
−55 to +150
°C
mW
mW/°C
°C/W
R
qJL
T
J
, T
stg
NSBC143ZPDXV6 (SOT−563) BOTH JUNCTION HEATED
(Note 3)
Total Device Dissipation
(Note 1)
T
A
= 25°C
Derate above 25°C
(Note 1)
Thermal Resistance,
Junction to Ambient
(Note 1)
P
D
500
4.0
R
qJA
T
J
, T
stg
P
D
231
269
1.9
2.2
R
qJA
540
464
MW
mW/°C
°C/W
250
−55 to +150
°C
mW
mW/°C
°C/W
Junction and Storage Temperature Range
NSBC143ZPDP6 (SOT−963) ONE JUNCTION HEATED
Total Device Dissipation
(Note 4)
T
A
= 25°C
(Note 5)
Derate above 25°C
(Note 4)
(Note 5)
Thermal Resistance,
Junction to Ambient
(Note 5)
(Note 4)
NSBC143ZPDP6 (SOT−963) BOTH JUNCTION HEATED
(Note 3)
Total Device Dissipation
(Note 4)
T
A
= 25°C
(Note 5)
Derate above 25°C
(Note 4)
(Note 5)
Thermal Resistance,
Junction to Ambient
(Note 5)
(Note 4)
P
D
339
408
2.7
3.3
R
qJA
369
306
−55 to +150
°C
MW
mW/°C
°C/W
Junction and Storage Temperature Range
1.
2.
3.
4.
5.
FR−4 @ Minimum Pad.
FR−4 @ 1.0
×
1.0 Inch Pad.
Both junction heated values assume total power is sum of two equally powered channels.
FR−4 @ 100 mm
2
, 1 oz. copper traces, still air.
FR−4 @ 500 mm
2
, 1 oz. copper traces, still air.
T
J
, T
stg
www.onsemi.com
2
MUN5333DW1, NSBC143ZPDXV6, NSBC143ZPDP6
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C both polarities Q
1
(PNP) & Q
2
(NPN), unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(V
CB
= 50 V, I
E
= 0)
Collector-Emitter Cutoff Current
(V
CE
= 50 V, I
B
= 0)
Emitter-Base Cutoff Current
(V
EB
= 6.0 V, I
C
= 0)
Collector-Base Breakdown Voltage
(I
C
= 10
mA,
I
E
= 0)
Collector-Emitter Breakdown Voltage (Note 6)
(I
C
= 2.0 mA, I
B
= 0)
ON CHARACTERISTICS
DC Current Gain (Note 6)
(I
C
= 5.0 mA, V
CE
= 10 V)
Collector-Emitter Saturation Voltage (Note 6)
(I
C
= 10 mA, I
B
= 1.0 mA)
Input Voltage (Off)
(V
CE
= 5.0 V, I
C
= 100
mA)
(NPN)
(V
CE
= 5.0 V, I
C
= 100
mA)
(PNP)
Input Voltage (On)
(V
CE
= 0.2 V, I
C
= 5.0 mA) (NPN)
(V
CE
= 0.2 V, I
C
= 5.0 mA) (PNP)
Output Voltage (On)
(V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 kW)
Output Voltage (Off)
(V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 kW)
Input Resistor
Resistor Ratio
6. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle
≤
2%.
h
FE
80
V
CE(sat)
−
V
i(off)
−
−
V
i(on)
−
−
V
OL
−
V
OH
4.9
R1
R
1
/R
2
3.3
0.08
−
4.7
0.1
−
6.1
0.14
kW
−
0.2
Vdc
0.9
0.91
−
−
Vdc
0.6
0.67
−
−
Vdc
−
0.25
Vdc
200
−
V
I
CBO
−
I
CEO
−
I
EBO
−
V
(BR)CBO
50
V
(BR)CEO
50
−
−
−
−
Vdc
−
0.18
Vdc
−
500
mAdc
−
100
nAdc
nAdc
Symbol
Min
Typ
Max
Unit
400
P
D
, POWER DISSIPATION (mW)
350
300
250
200
150
100
50
0
−50
−25
0
25
50
75
100
125
150
(1) (2) (3)
(1) SOT−363; 1.0
×
1.0 Inch Pad
(2) SOT−563; Minimum Pad
(3) SOT−963; 100 mm
2
, 1 oz. Copper Trace
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
www.onsemi.com
3
MUN5333DW1, NSBC143ZPDXV6, NSBC143ZPDP6
TYPICAL CHARACTERISTICS − NPN TRANSISTOR
MUN5333DW1, NSBC143ZPDXV6
1
V
CE(sat)
, COLLECTOR−EMITTER
SATURATION VOLTAGE (V)
I
C
/I
B
= 10
h
FE
, DC CURRENT GAIN
150°C
1000
V
CE
= 10 V
0.1
150°C
100
25°C
−55°C
−55°C
25°C
0.01
10
1
10
I
C
, COLLECTOR CURRENT (mA)
100
1
10
I
C
, COLLECTOR CURRENT (mA)
100
Figure 2. V
CE(sat)
versus I
C
3.2
I
C
, COLLECTOR CURRENT (mA)
2.8
C
ob
, CAPACITANCE (pF)
2.4
2
1.6
1.2
0.8
0.4
0
0
10
20
30
40
50
f = 10 kHz
I
E
= 0 A
T
A
= 25°C
100
150°C
10
Figure 3. DC Current Gain
−55°C
1
0.1
25°C
0.01
V
O
= 5 V
0
1
2
V
in
, INPUT VOLTAGE (V)
3
4
0.001
V
R
, REVERSE BIAS VOLTAGE (V)
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
10
V
in
, INPUT VOLTAGE (V)
−55°C
1
150°C
25°C
V
O
= 0.2 V
0.1
0
10
20
30
40
I
C
, COLLECTOR CURRENT (mA)
50
Figure 6. Input Voltage versus Output Current
www.onsemi.com
4
MUN5333DW1, NSBC143ZPDXV6, NSBC143ZPDP6
TYPICAL CHARACTERISTICS − PNP TRANSISTOR
MUN5333DW1, NSBC143ZPDXV6
V
CE(sat)
, COLLECTOR−EMITTER VOLTAGE (V)
1
I
C
/I
B
= 10
75°C
0.1
−25°C
25°C
h
FE
, DC CURRENT GAIN
1000
V
CE
= 10 V
75°C
100
−25°C
25°C
0.01
10
0.001
0
20
40
30
10
I
C
, COLLECTOR CURRENT (mA)
50
1
1
10
I
C
, COLLECTOR CURRENT (mA)
100
Figure 7. V
CE(sat)
vs. I
C
Figure 8. DC Current Gain
10
I
C
, COLLECTOR CURRENT (mA)
9
C
ob
, CAPACITANCE (pF)
8
7
6
5
4
3
2
1
0
0
10
20
30
40
50
V
R
, REVERSE BIAS VOLTAGE (V)
f = 10 kHz
I
E
= 0 A
T
A
= 25°C
100
75°C
10
25°C
1
0.1
−25°C
0.01
V
O
= 5 V
0
1
2
3
4
5
6
7
V
in
, INPUT VOLTAGE (V)
8
9
10
0.001
Figure 9. Output Capacitance
10
Figure 10. Output Current vs. Input Voltage
V
in
, INPUT VOLTAGE (V)
−25°C
1
75°C
25°C
V
O
= 0.2 V
0.1
0
40
10
20
30
I
C
, COLLECTOR CURRENT (mA)
50
Figure 11. Input Voltage vs. Output Current
www.onsemi.com
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
