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HI-3000H, HI-3001H

December 2012

1Mbps Avionics CAN Transceiver

with High Operating Temperature

PIN CONFIGURATIONS

(Top Views)

TXD - 1

GND - 2

VDD - 3

RXD - 4

HI-3000PSHF

HI-3000CRH

GENERAL DESCRIPTION

The HI-3000H is a 1 Mbps Controller Area Network

(CAN) transceiver optimized for use in high temperature

avionics applications. The device is capable of operating

at extended temperature ranges of -55°C to 175°C for

plastic packages and -55°C to 200°C for the ceramic

CERDIP-8 package. It interfaces between a CAN proto-

col controller and the physical wires of the bus in a CAN

network. Differential output amplitude and current drive

capability are specifically enhanced to meet the needs of

long cable runs typical of avionics applications.

The HI-3000H supports two modes of operation: Normal

Mode and Standby Mode. The Standby Mode is a very

low-current mode which continues to monitor bus activity

and allows an external controller to manage wake-up.

Superior common-mode receiver performance makes

the device especially suitable for applications where

ground reference voltages may vary from point to point

over long distances along the CAN bus. In addition, the

HI-3000H provides a SPLIT pin to give an output refer-

ence voltage of VDD/2 which can be used for stabilizing

the recessive bus level when the split termination tech-

nique is used to terminate the bus.

A TXD dominant time-out feature protects the bus from

being driven into a permanent dominant state (so-called

“babbling idiot”) if pin TXD becomes permanently low due

to application failure.

The device also has short circuit protection to +/-58V on

CANH, CANL and SPLIT pins and ESD protection to

+/- 6kV on all pins.

The HI-3001H is identical to the HI-3000H except the

SPLIT pin is substituted with a VIO supply voltage pin.

This allows the HI-3001H to interface directly with con-

trollers with 3.3V supply voltages.

8 - STB

7 - CANH

6 - CANL

5 - SPLIT

TXD - 1

GND - 2

VDD - 3

RXD - 4

HI-3001PSHF

HI-3001CRH

8 - STB

7 - CANH

6 - CANL

5 - VIO

8-Pin Plastic SOIC package (Narrow Body)

& 8-Pin Ceramic CERDIP

FEATURES

·

Extended Temperature Ranges -55°C to 175°C (plastic

·

SOIC-8 package) and -55°C to 200°C (ceramic CERDIP-

8 package)

Compatible with ARINC 825 and ISO 11898-5 standards.

Signaling rates up to 1Mbit/s.

Internal VDD/2 voltage source available to stabilize the

recessive bus level if split termination is used (HI-3000H

SPLIT pin).

VIO input on HI-3001H allows for direct interfacing with

3.3V controllers.

Detection of permanent dominant on TXD pin (babbling

idiot protection).

High impedance allows connection of up to 120 nodes.

Input levels compatible with 3.3V or 5V controllers.

CANH, CANL and SPLIT pins short-circuit proof to +/-

58V.

Will not disturb the bus if unpowered.

( DS 3000H Rev. New)

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12/12

HI-3000H, HI-3001H

PIN DESCRIPTIONS

SIGNAL

TXD

GND

VDD

RXD

CANL

CANH

STB

SPLIT

(HI-3000H)

VIO

(HI-3001H)

FUNCTION

INPUT

POWER

OUTPUT

BUS I/O

INPUT

DESCRIPTION

100kOhm internal pull-up. Transmit Data Input.

Chip 0V supply

Positive supply, 5V +/-5%. Bypass with 0.1uF ceramic capacitor.

Receive Data Output.

CAN Bus Line Low.

CAN Bus Line High.

100kOhm internal pull-up. Standby Mode selection input. Drive STB low or connect to GND

for Normal operation. Drive STB high to select low-current Standby Mode.

Supplies a VDD/2 output to provide recessive bus level stabilization when a split termination

is used to terminate the bus.

Connect to a 3.3V supply to allow compatibility of all digital I/O (RXD, TXD, STB) with a

3.3V controller input.

BLOCK DIAGRAM

VDD

V Split

SPLIT

(HI-3000H)

CANH

TXD

Dominant

Detect

CANL

Driver

TXD

Standby

Control

STB

VIO

(HI-3001H)

RXD

MUX

Main

Receiver

GND

Low power

Standby Rx

Figure 1. HI-3000H Functional Block Diagram

HOLT INTEGRATED CIRCUITS

2

HI-3000H, HI-3001H

FUNCTIONAL DESCRIPTION

OPERATING MODES

The HI-3000H provides two modes of operation which are

selectable via the STB pin. Table 1 summarizes the modes.

Table 1 - Operating Modes

due to an unpowered node with high leakage from the bus

lines to ground), the split circuit will force the recessive

voltage to VDD/2.

INTERNAL PROTECTION FEATURES

Short-circuit protection

Short-circuit protection is provided on the CANH, CANL and

SPLIT pins. These pins are protected from ESD to over 6KV

(HBM) and from shorts between -58V and +58V continuous,

as specified in ISO 11898-5. The short circuit current is limited

to less than 200mA typical.

TXD permanent dominant time-out

Normal Mode

Normal mode is selected by setting the STB pin to a LOW

logic level (GND). In this mode, the transceiver transmits and

receives data in the usual way from the CANH and CANL bus

lines. The differential receiver converts the analog bus data

to digital data which is output on the RXD pin (Note: the RXD

output on HI-3001H is compatible with 3.3V controllers if the

VIO pin is connected to a 3.3V supply).

Standby Mode

Standby Mode is selected by setting the STB pin to a HIGH

logic level. In this mode, the transmitter is switched off and a

low power differential receiver monitors the bus lines for

activity. A dominant signal of more than 3

m

s will be reflected

on the RXD pin as a logic LOW, where it may be detected by

the host as a wake-up request. The device will not leave

standby mode until the host forces the STB pin to a logic low.

A timer circuit prevents the bus lines being driven into a

permanent dominant state, which would result in a situation

blocking all bus traffic. This could happen in the case of the

TXD pin becoming permanently low due to a hardware or

application failure. The timer is triggered by a negative edge

on the TXD pin (start of dominant state). If the TXD pin is not

set high (recessive state) after a typical time of 2ms, the

transmitter outputs will be disabled, driving the bus lines into

the recessive state. The timer is reset by a positive edge on

the TXD pin. Note that the minimum TXD dominant time-out

time, tdom = 300μs, defines the minimum possible bit rate of

40kbit/s (the CAN protocol specifies a maximum of 11

successive dominant bits − 5 successive dominant bits

immediately followed by an error frame).

Fail-safe features

Pin TXD has a pull up in order to force a recessive level if pin

TXD is left open.

Pins TXD and STB will become floating if power is lost. This

will prevent reverse currents via these pins.

MODE

Normal

Standby

STB pin

LOW

HIGH

SPLIT Circuit

The SPLIT pin provides a stable VDD/2 DC voltage. This

pin can be used to stabilize the recessive common mode

voltage by connecting the SPLIT pin to the center tap of the

split termination (see figure 7). In the case of a recessive

bus voltage dropping below the ideal value of VDD/2 (e.g.

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3

HI-3000H, HI-3001H

TIMING DIAGRAMS

Timing Delays

HIGH

TXD

LOW

CANH

CANL

Dominant

0.9V

V

DIFF(BUS)

=

V

CANH

-

V

CANL

0.5V

Recessive

HIGH

RXD

t

dr(TXD)

t

df(TXD)

t

df(RXD)

t

Prop1

t

Prop2

t

dr(RXD)

50%

LOW

TXD dominant time-out feature

t

dom(TXD)

recessive

TXD

dominant

transmitter disabled

CANH

CANL

transmitter

enabled

t

Rdom

HIGH

LOW

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HI-3000H, HI-3001H

ABSOLUTE MAXIMUM RATINGS

(Voltages referenced to GND = 0V)

Supply Voltage, VDD, VIO : .....................................................................7V

Current at Input pins ......................................................-100mA to +100mA

DC Voltages at TXD, RXD and STB ..............................-0.5V to V

DD

+0.5V

DC Voltages at CANH, CANL and SPLIT: ...............................-58V to +58V

Internal Power Dissipation: ..............................................................900mW

Electrostatic Discharge (ESD)

1

, All pins ..........................................+/- 6kV

Operating Temperature Range: (Plastic)...........................-55°C to +175°C

(Ceramic) ........................-55°C to +200°C

Storage Temperature Range:

Soldering Temperature:

-65°C to +150°C

(Ceramic)......................60 sec. at +300°C

(Plastic - leads).............10 sec. at +280°C

(Plastic - body) .....................+260°C Max.

NOTES:

1. Human Body Model (HBM).

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only. Functional

operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

DC ELECTRICAL CHARACTERISTICS

V

DD

= 5V

±

5%, Operating temperature range (unless otherwise noted). Positive currents flow into the IC.

LIMITS

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY CURRENT

V

DD

Supply Current

VIO Supply Current

I

DD

I

IO

Recessive: V

TXD

= V

DD

Dominant: V

TXD

= 0 V

Standby Mode: V

TXD

= V

DD

6

50

15

10

70

50

100

mA

μA

DIGITAL INPUTS (Pins TXD, STB)

HIGH-level input voltage (see Note 1)

LOW-level input voltage (TXD pin)

HIGH-level input current

LOW-level input current

V

IH

V

IL

I

IH

I

IL

V

TXD

= V

DD

or VIO

V

TXD

= 0 V

80%V

DD

− 0.5

−5

0

− 50

V

DD

+ 0.5

20%V

DD

+5

− 150

V

μA

DIGITAL OUTPUTS

HIGH-level output voltage (RXD Pin) (see Note 1)

LOW-level output voltage (RXD Pin)

Output voltage (SPLIT Pin)

Standby leakage current (SPLIT Pin)

V

OH

V

OL

V

SPLIT

I

STB

I

OH

= 1mA

I

OL

= 1mA

− 100 μA < I

SPLIT

< 100 μA

90%V

DD

0

0.45V

DD

-5

0.1

0.5V

DD

10%V

DD

0.55V

DD

+5

V

μA

DRIVER

CANH dominant output voltage

CANL dominant output voltage

Recessive output voltage

Bus output voltage in standby

Dominant differential output voltage

Recessive differential output voltage

Matching of dominant output voltage,

V

DD

− V

O(CANH)

− V

O(CANL)

Steady state common mode output voltage

V

O(CANH)

V

O(CANL)

V

CANH(r)

,

V

CANL(r)

V

STB

V

DIFF(d)(o)

V

DIFF(r)(o)

V

OM

V

OC(ss)

V

TXD

= 0 V

V

TXD

= 0 V (See Fig. 2)

V

TXD

= V

DD

, R

L

= 0 (See Fig. 2)

V

TXD

= V

DD

, R

L

= 0 (See Fig. 2)

V

TXD

= 0 V, 45 Ω < R

L

< 65 Ω

V

TXD

= V

DD

, no load (See Fig. 2)

(See Fig. 4)

V

STB

= 0V, R

L

= 60 Ω (See Fig. 5)

3

0.5

2

-0.1

1.5

− 50

− 100

2

1.8

0

-40

0.5V

DD

3.6

1.4

0.5V

DD

4.25

1.75

3

0.1

3

50

150

3

V

mV

V

NOTE:

1. When VIO is connected (HI-3001H), limits are referenced wrt VIO rather than V

DD

.

HOLT INTEGRATED CIRCUITS

5

HI-3000H

HI-3000H概述

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