b. See Solder Profile (http://www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not
plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure
adequate bottom side solder interconnection.
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 73139
S-51412—Rev. C, 01-Aug-05
www.vishay.com
1
Si7116DN
Vishay Siliconix
MOSFET SPECIFICATIONS (T
J
= 25_C UNLESS OTHERWISE NOTED)
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
Drain-Source On-State Resistance
a
Forward Transconductance
a
Diode Forward Voltage
a
V
GS(th)
I
GSS
I
DSS
I
D(on)
r
DS(on)
g
fs
V
SD
V
DS
= V
GS
, I
D
= 250
mA
V
DS
= 0 V, V
GS
=
"20
V
V
DS
= 40 V, V
GS
= 0 V
V
DS
= 40 V, V
GS
= 0 V, T
J
= 55_C
V
DS
w
5 V, V
GS
= 10 V
V
GS
= 10 V, I
D
= 16.4 A
V
GS
= 4.5 V, I
D
= 14.5 A
V
DS
= 15 V, I
D
= 16.4 A
I
S
= 3.2 A, V
GS
= 0 V
40
0.0065
0.0083
68
0.8
1.2
0.0078
0.010
S
V
1.5
2.5
"100
1
5
V
nA
mA
A
W
Symbol
Test Condition
Min
Typ
Max
Unit
Dynamic
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate-Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
Body Diode Reverse Recovery Charge
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
t
rr
Q
rr
I
F
= 3.2 A, di/dt = 100 A/ms
I
F
= 3.2 A, di/dt = 100 A/ms
V
DD
= 20 V, R
L
= 20
W
I
D
^
1 A, V
GEN
= 10 V, R
g
= 6
W
f = 1 MHz
0.7
V
DS
= 20 V, V
GS
= 4.5 V, I
D
= 16.4 A
15
6.7
5.1
1.4
10
10
36
10
30
26
2.1
15
15
55
15
60
52
nc
ns
W
23
nC
Notes
a. Pulse test; pulse width
v
300
ms,
duty cycle
v
2%.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
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