PIMZ2; PUMZ2
NPN/PNP general-purpose double transistors
Rev. 06 — 17 November 2009
Product data sheet
1. Product profile
1.1 General description
NPN/PNP general-purpose double transistors.
Table 1.
Product overview
Package
NXP
PIMZ2
PUMZ2
SOT457
SOT363
JEITA
SC-74
SC-88
NPN/PNP double transistors
NPN/PNP double transistors
Configuration
Type number
1.2 Features
Simplified circuit design
Reduced component count
Reduced pick and place costs
1.3 Applications
General-purpose switching and amplification
1.4 Quick reference data
Table 2.
Symbol
V
CEO
I
C
Quick reference data
Parameter
collector-emitter voltage
collector current (DC)
Conditions
open base
Min
-
-
Typ
-
-
Max
50
150
Unit
V
mA
NXP Semiconductors
PIMZ2; PUMZ2
NPN/PNP general-purpose double transistors
2. Pinning information
Table 3.
Pin
1
2
3
4
5
6
Pinning
Description
collector TR2
emitter TR2
collector TR1
emitter TR1
base TR1
base TR2
1
TR1
Simplified outline
Symbol
PIMZ2 (SOT457)
6
5
4
6
5
4
1
2
3
TR2
2
3
sym082
PUMZ2 (SOT363)
1
2
3
4
5
6
emitter TR1
base TR1
base TR2
collector TR2
emitter TR2
collector TR1
1
2
3
1
2
3
sym083
6
5
4
6
5
TR2
4
TR1
3. Ordering information
Table 4.
Ordering information
Package
Name
PIMZ2
PUMZ2
SC-74
SC-88
Description
plastic surface mounted package; 6 leads
plastic surface mounted package; 6 leads
Version
SOT457
SOT363
Type number
4. Marking
Table 5.
PIMZ2
PUMZ2
[1]
* = -: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
Marking codes
Marking code
[1]
M6
GZ*
Type number
PIMZ2_PUMZ2_6
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
2 of 9
NXP Semiconductors
PIMZ2; PUMZ2
NPN/PNP general-purpose double transistors
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
BM
P
tot
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current (DC)
peak collector current
peak base current
total power dissipation
SOT457
SOT363
T
stg
T
j
T
amb
Per device
P
tot
total power dissipation
SOT457
SOT363
[1]
Device mounted on an FR4 printed-circuit board.
Conditions
open emitter
open base
open collector
Min
-
-
-
-
-
-
Max
60
50
7
150
200
100
200
180
+150
150
+150
Unit
V
V
V
mA
mA
mA
mW
mW
°C
°C
°C
Per transistor; for the PNP transistor with negative polarity
T
amb
≤
25
°C
[1]
[1]
-
-
−65
-
−65
storage temperature
junction temperature
ambient temperature
T
amb
≤
25
°C
[1]
[1]
-
-
300
300
mW
mW
6. Thermal characteristics
Table 7.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to ambient
SOT457
SOT363
Per device
R
th(j-a)
thermal resistance from
junction to ambient
SOT457
SOT363
[1]
Device mounted on an FR4 printed-circuit board.
Conditions
T
amb
≤
25
°C
[1]
[1]
Min
Typ
Max
Unit
Per transistor
-
-
-
-
625
694
K/W
K/W
T
amb
≤
25
°C
[1]
[1]
-
-
-
-
417
417
K/W
K/W
PIMZ2_PUMZ2_6
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
3 of 9
NXP Semiconductors
PIMZ2; PUMZ2
NPN/PNP general-purpose double transistors
7. Characteristics
Table 8.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol Parameter
I
CBO
I
EBO
h
FE
V
CEsat
f
T
C
c
V
CEsat
f
T
C
c
Conditions
Min
-
-
-
120
-
-
-
-
100
-
Typ
-
-
-
250
-
190
2.3
-
-
-
Max
100
50
100
560
−500
-
5
250
-
3
mV
MHz
pF
mV
MHz
pF
Unit
nA
μA
nA
Per transistor; for the PNP transistor with negative polarity; unless otherwise specified
collector-base cut-off current V
CB
= 60 V; I
E
= 0 A
V
CB
= 60 V; I
E
= 0 A; T
j
= 150
°C
emitter-base cut-off current
DC current gain
collector-emitter saturation
voltage
transition frequency
collector capacitance
collector-emitter saturation
voltage
transition frequency
collector capacitance
V
EB
= 7 V; I
C
= 0 A
V
CE
= 6 V; I
C
= 1 mA
I
C
=
−50
mA; I
B
=
−5
mA
I
E
=
−2
mA; V
CE
=
−12
V; f = 100 MHz
I
E
= i
e
= 0 A; V
CB
=
−12
V; f = 1 MHz
I
C
= 50 mA; I
B
= 5 mA
I
E
= 2 mA; V
CE
= 12 V; f = 100 MHz
I
E
= i
e
= 0 A; V
CB
= 12 V; f = 1 MHz
TR1 (PNP)
TR2 (NPN)
PIMZ2_PUMZ2_6
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 06 — 17 November 2009
4 of 9
NXP Semiconductors
PIMZ2; PUMZ2
NPN/PNP general-purpose double transistors
8. Package outline
Plastic surface-mounted package (TSOP6); 6 leads
SOT457
D
B
E
A
X
y
HE
v
M
A
6
5
4
Q
pin 1
index
A
A1
c
1
2
3
Lp
e
bp
w
M
B
detail X
0
1
scale
2 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
1.1
0.9
A1
0.1
0.013
bp
0.40
0.25
c
0.26
0.10
D
3.1
2.7
E
1.7
1.3
e
0.95
HE
3.0
2.5
Lp
0.6
0.2
Q
0.33
0.23
v
0.2
w
0.2
y
0.1
OUTLINE
VERSION
SOT457
REFERENCES
IEC
JEDEC
JEITA
SC-74
EUROPEAN
PROJECTION
ISSUE DATE
05-11-07
06-03-16
Fig 1.
Package outline SOT457 (SC-74)
© NXP B.V. 2009. All rights reserved.
PIMZ2_PUMZ2_6
Product data sheet
Rev. 06 — 17 November 2009
5 of 9
模拟电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
