5.0x7.0mm
Surface Mount LVDS
Clock Oscillator Series
Description
Model Specifications
Features:
C
W
0846
The Connor-Winfield LMxxx
LM
155.5 123
- Series are 5x7.0mm
2MHz
Surface Mount, LVDS,
Fixed Frequency Crystal
Controlled Oscillator (XO).
Through the use of
multiplication, the LMxxx - Series are
designed for applications requiring tight
frequency stability, wide temperature
range and low jitter. Operating at 2.5V
or 3.3V supply voltage, the LMxxx -
Series provides LVDS Differential
Outputs with enable / disable function.
The surface mount package is designed
for high-density mounting and is
optimum for mass production.
Model LMxxx - Series
5.0 x7.0mm Surface Mount Package
2.5V or 3.3V Operation
LVDS Output Logic
Frequency Stabilities Available:
LM14x / LM34x / LM44x: +/-20ppm
LM11x / LM31x / LM41x: +/-25ppm
LM12x / LM22x / LM32x / LM42x: +/-50ppm
LM13x / LM23x / LM33x / LM43x: +/-100ppm
Temperature Ranges Available:
LM1xx Series: 0 to 70°C
LM2xx Series: -40 to 85°C
LM3xx Series: 0 to 85°C
LM4xx Series: -20 to 70°C
Low Jitter <1pS RMS
Tri-State Enable/Disable
Tape and Reel Packaging
RoHS Compliant / Lead Free
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
US Headquarters:
630-851-4722
European Headquarters:
+353-61-472221
Model Specifications
Absolute Maximum Ratings
Parameter
Storage Temperature
Supply Voltage
Input Voltage
(Vcc)
Units
Minimum
-55
-0.5
-0.5
Nominal
-
-
-
Maximum
125
4.6
Vcc+0.5
Units
°C
Vdc
Vdc
Table 2.0
(Fo)
Minimum
100
Nominal
-
Maximum
670
Units
MHz
ppm
ppm
ppm
ppm
°C
°C
°C
°C
Vdc
Vdc
mA
ps RMS
ps RMS
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc
Table 3.0
Minimum
(Vil)
(Vih)
-
0.7Vcc
Nominal
Note
Table 1.0
Note
Operating Specifications
Parameter
Center Frequency
Total Frequency Tolerance
Model LMx4x (See Table 9)
Model LMx1x (See Table 9)
Model LMx2x (See Table 9)
Model LMx3x (See Table 9)
Operating Temperature Range
Model LM1xx
Model LM4xx
Model LM3xx
Model LM2xx
Supply Voltage
Model LMxx2
Model LMxx3
Supply Current
Period Jitter
Phase Jitter- BW=12KHz to 20MHz
SSB Phase Noise at 10Hz offset
SSB Phase Noise at 100Hz offset
SSB Phase Noise at 1KHz offset
SSB Phase Noise at 10KHz offset
SSB Phase Noise at 100KHz offset
Sub-Harmonics
(See Table 9)
(See Table 9)
(Icc)
(See Table 9)
(See Table 9)
(See Table 9)
(See Table 9)
(Vcc)
2.375
3.135
-
-
-
-
-
-
-
-
-
2.500
3.3
60
3
0.6
-40
-75
-95
-110
-115
-60
2.625
3.465
90
5
1.0
-
-
-
-
-
-50
0
-20
0
-40
-
-
-
-
70
70
85
85
(See Table 9 for full part number)
-20
-
20
-25
-
25
-50
-
50
-100
-
100
1
1
1
1
Input Characteristics
Parameter
Disable Input Voltage (Low)
Enable Input Voltage (High)
-
-
Nominal
-
-
700
50
0.3
Maximum
0.3Vcc
-
Units
Vdc
Vdc
Note
2
2
Table 4.0
LVDS Output Characteristics
Parameter
LOAD
Output Differential Voltage
(Vod)
Output Swing (Differential Output peak to peak) (Vopp)
Duty Cycle measured at 50%
Differential Rise / Fall Time 20% to 80%
Minimum
-
250
500
45
-
Maximum
100
450
900
55
0.7
Units
Ohms
mV
mV
%
ns
Note
3
4
Bulletin
Page
Revision
Date
Ds030
1 of 2
P01
24 Sep 2009
Notes
1)
2)
3)
4)
Includes initial tolerance, deviation over temperature, supply and load variations, shock, vibration and 20 years
aging.
When the oscillator is disabled, the outputs are at High Impedance. Output is enabled with no connection on pad 1.
Vod measured with 100 ohm resistor between the true output and the complementary output.
Duty Cycle measured at 50% of output swing.
Specifications subject to change without notice. All dimensions in inches. © Copyright 2008 The Connor-Winfield Corporation
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630-851-4722
Fax: 630-851-5040
www.conwin.com
Ordering Information
Package Outline
LM
Type:
LVDS
Clock Series
5x7mm
1
Temperature Range:
1 = 0 to 70° C
2 = -40 to 85° C
3 = 0 to 85° C
4 = -20 to 70° C
2
Frequency Stability:
4 = +/-20 ppm^
1 = +/-25 ppm^
2 = +/-50 ppm
3 = +/-100 ppm
3
Supply Voltage:
2 = 2.5Vdc.
3 = 3.3Vdc.
-
155.52M
Output Frequency:
Frequency Format
-xxx.xM Min.*
-xxx.xxxxxxM Max.*
*Amount of numbers
after the decimal point.
M = MHz
0.275
(7.0mm)
0.197
(5.0mm)
CW 0846
LM123
155.52M
^ Models LM212, LM213, LM242 and LM243 are not currently available.
Example: LM123-155.52M = LVDS Clock, 0 to 70°C, +/-50ppm, 3.3Vdc @ 155.52 MHZ
0.069
(1.75mm)
Package Characteristics
Package
Soldering Process
Vibration:
Shock:
Soldering:
Solderability
Table 5.0
Hermetically sealed ceramic package and metal cover.
RoHS compliant, see solder profile on page 2.
Suggested Pad Layout
Environmental Characteristics
Table 6.0
Vibration per Mil Std 883E Method 2007.3 Test Condition A
Mechanical Shock per Mil Std 883E Method 2002.4 Test Condition B.
SMD product suitable for Convection Reflow soldering. Peak
temperature 260°C. Maximum time above 220°C, 60 seconds.
Solderability per Mil Std 883E Method 2003
LVDS Output Waveform
Table 8.0
Enable / Disable
Function (Pad 1)
High or Open
Low
Output
Enable
Disable (High Impedance)
Q
Vod
Q
Differential
Output
Waveform
peak-to-peak
80%
0V
t
r
t
f
0V
20%
Vod
Duty Cycle
Pad Connections - Enable / Disable Function
Pad
1
2
3
4
5
6
Table 7.0
Connection
Enable / Disable
N/C
Ground
Q Output
Q Output
Vcc
Vopp
0V
Model Matrix
Table 9.0
Frequency
Frequency Frequency Frequency
Supply
Temperature
Tolerance
Tolerance
Tolerance
Tolerance
Voltage
Range
±20ppm
±25ppm
±50ppm
±100ppm
LM142
LM112
LM122
LM132
2.5Vdc
0 to 70°C
LM442
LM412
LM422
LM432
2.5Vdc
-20 to 70°C
LM342
LM312
LM322
LM332
2.5Vdc
0 to 85°C
x
x
LM222
LM232
2.5Vdc
-40 to 85°C
LM143
LM113
LM123
LM133
3.3Vdc
0 to 70°C
LM443
LM413
LM423
LM433
3.3Vdc
-20 to 70°C
LM343
LM313
LM323
LM333
3.3Vdc
0 to 85°C
x
x
LM223
LM233
3.3Vdc
-40 to 85°C
X = Models LM212, LM213, LM242 and LM243 are not currently available.
Tape and Reel Specifications
Test Circuit
Vcc
Power
Supply
Ground
0.01uF
Q
100
ohm
Q
Enable/
Disable
or
N/C
Solder Profile
Temperature
260°C
220°C
180°C
150°C
120°C
260°C
1
0
120 S
Max.
Time
10 S
60 S
Max.
360 Sec. Max.
US Headquarters:
630-851-4722
European Headquarters:
+353-61-472221
Specifications subject to change without notice. All dimensions in inches. © Copyright 2008 The Connor-Winfield Corporation
Bulletin
Page
Revision
Date
Ds030
2 of 2
P01
24 Sep 2009
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