RT3668EB
Single Channel PWM Controller with 2 Integrated Drivers and
1 LDO Regulator for AMD SVI2 GFX and FCH Power Supply
General Description
The RT3668EB is a single channel PWM controller with
2 integrated drivers and 1 LDO regulator, it is compliant
with AMD SVI2 Voltage Regulator Specification to
support FP4 GFX power (VDDCR_GFX) and FCH
power (VDDCR_FCH_S5). The RT3668EB features
CCRCOT (Constant Current Ripple Constant On-Time)
with G-NAVP (Green-Native AVP), which is Richtek's
proprietary topology. G-NAVP makes it an easy setting
controller to meet all AMD AVP (Adaptive Voltage
Positioning) GFX requirements. The droop is easily
programmed by setting the DC gain of the error
amplifier. With proper compensation, the load transient
response can achieve optimized AVP performance. The
controller also uses the interface to issue VOTF
Complete and to send digitally encoded voltage and
current values for the GFX domains. The RT3668EB
can operate in diode emulation mode to enhance the
light load efficiency. And it provides the current gain
adjustment capability by pin setting. The RT3668EB
also provides power good indication, thermal indication
(VRHOT_L), and it features complete fault protection
functions including over current, over voltage, under
voltage.
Features
2/1-Phase (VDDCR_GFX) PWM Controller
2 Embedded MOSFET Driver
1 LDO Regulator for FCH
G-NAVPTM Topology
Support Dynamic Load-Line and Zero Load-Line
Diode Emulation Mode at Light Load Condition
SVI2 Interface to Comply with AMD Power
Management Protocol
Adjustable Current Gain Capability
DVID Enhancement
0.5% DAC Accuracy
Differential Remote Voltage Sensing
Build-in ADC for Pin Setting Programming,
Thermal Indication and VOUT, IOUT Reporting
Fast Transient Response
Power Good Indicator
Thermal Indicator (VRHOT_L)
OVP, UVP and UVLO
Over Current Protection
Applications
AMD FP4 GFX and FCH Power
Simplified Application Circuit
RT3668EB
VRHOT_L
PHASE1
SVC
To GFX
SVD
SVT
MUX_CTRL
V
VDDNB
VSEN_NB_IN
S5_OUT
V
VDDCR_FCH_S5
LDO_OUT
PHASE2
LDO_IN
MOSFET
MOSFET
V
IN_LDO
V
OUT_LDO
V
VDDCR_GFX
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS3668EB-05
August 2019
www.richtek.com
1
RT3668EB
Ordering Information
RT3668EB
Package Type
QW : WQFN-40L 5x5 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
Pin Configuration
(TOP VIEW)
NC
BOOT2
UGATE2
PHASE2
LGATE2
PVCC
LGATE1
PHASE1
UGATE1
BOOT1
40 39 38 37 36 35 34 33 32 31
RoHS compliant and compatible with the current
requirements of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Marking Information
RT3668EB
GQW
YMDNN
RT3668EBGQW : Product Number
YMDNN : Date Code
PGOOD
EN
VIN
RGND
COMP
FB
ISEN2P
ISEN2N
VSEN
ISEN1P
1
2
3
4
5
6
7
8
9
10
11 12 13 14 15 16 17 18 19 20
41
30
29
28
27
26
25
24
23
22
21
GND
NC
LDO_VIN
MUX_CTRL
FBA
LDO_OUT
S5_OUT
VSEN_NB_IN
NC
VDDIO
SVT
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
ISEN1N
VRHOT_L
TSEN
SET1
IMON
VREF_PINSET
VCC
PWROK
SVC
SVD
WQFN-40L 5x5
DS3668EB-05
August 2019
RT3668EB
Functional Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
Pin Name
PGOOD
EN
VIN
RGND
COMP
FB
ISEN2P
ISEN2N
VSEN
ISEN1P
ISEN1N
VRHOT_L
Pin Function
Power good indicator for the GFX controller. This pin is an open drain output.
Controller enable input pin.
VIN input pin. Connect a low pass filter to this pin.
Return ground of GFX controller. This pin is the common negative input of
output voltage differential remote sense of GFX controller.
Error amplifier output pin of the GFX controller.
Output voltage feedback input of GFX controller. This pin is the negative input
of the error amplifier for the GFX controller.
Positive current sense input of phase 2 for GFX controller.
Negative current sense input of Phase 2 for GFX controller.
GFX controller voltage sense input. This pin is connected to the terminal of
GFX controller output voltage.
Positive current sense input of phase 1 for GFX controller.
Negative current sense input of phase 1 for GFX controller.
Thermal indicator. This pin is an open drain output. (Active low)
This pin provides two functions: Platform Setting, Platform can use this pin
to set frequency, initial offset and per-phase OCP threshold of GFX
Controller. The other function is thermal sense input for VRHOT indicator, so
this pin must to be connected to the NTC network for thermal sense.
Platform setting pin. Platform can use this pin to set AI gain, QRTH of GFX
Controller.
Current monitor output for the GFX controller. This pin outputs a voltage
proportional to the output current.
13
TSEN
14
15
SET1
IMON
16
This pin provides two functions : the 3.2V power supply for pin setting
function divided resistors. The other function is fixed 0.8V output reference
VREF_PINSET voltage, and the voltage is only used to offset the output voltage of IMON pin.
Connect a RC circuit from this pin to GND. The recommended resistor is from
3.9 to 10, and the capacitor is 0.47F.
VCC
Controller power supply. Connect this pin to 5V and place a decoupling
capacitor 2.2F at least. The decoupling capacitor is as close controller as
possible.
System power good input. If PWROK is low, the SVI interface is disabled and
VR returns to BOOT-VID state with initial load-line slope and initial offset. If
PWROK is high, the SVI interface is running and the DAC decodes
the
received serial VID codes to determine the output voltage.
Serial VID clock input.
Serial VID data input. This pin is a serial data line.
Serial VID telemetry output from VR. This pin is a push-pull output.
Processor memory interface power rail and serves as the reference for
PWROK, SVD, SVC and SVT. This pin is used by the VR to reference the
SVI pins.
No internal connection.
17
18
PWROK
19
20
21
22
23
SVC
SVD
SVT
VDDIO
NC
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS3668EB-05
August 2019
www.richtek.com
3
RT3668EB
Pin No.
24
25
26
27
Pin Name
VSEN_NB_IN
S5_OUT
LDO_OUT
FBA
Pin Function
This pin is connected to the output of VDDNB controller.
FCH power output.
LDO output.
LDO output voltage feedback input.
MUX control input. When the pin pulled high, the S5_OUT output voltage is
forced to VSEN_NB_IN pin voltage. If the pin pulled low, the S5_OUT output
voltage is forced to VSEN_NB_IN pin voltage when the VSEN_NB_IN
voltage is greater than LDO_OUT voltage; otherwise, the S5_OUT voltage is
forced to LDO_OUT pin voltage.
LDO power input.
No internal connection.
Bootstrap supply of phase1 for high side MOSFET. This pin powers high side
MOSFET driver.
Upper gate driver output of phase1. Connect this pin to the gate input of high
side MOSFET.
Switch nodes of high side driver for phase1. Connect this pin to high side
MOSFET Source together with the low side MOSFET Drain and the inductor.
Lower gate driver output of phase1. Connect this pin to the gate input of low
side MOSFET.
Driver power supply. Connect this pin to GND by the 2.2F ceramic capacitor
at least. The decoupling capacitor is as close controller as possible.
Lower gate driver output of phase2. Connect this pin to the gate input of low
side MOSFET.
Switch nodes of high side driver for phase2. Connect this pin to high side
MOSFET Source together with the low side MOSFET Drain and the inductor.
Upper gate driver output of phase2. Connect this pin to the gate input of high
side MOSFET.
Bootstrap supply of phase2 for high side MOSFET. This pin powers high side
MOSFET driver.
No internal connection.
Ground. The exposed pad must be soldered to a large PCB and connected
to GND for maximum power dissipation.
28
MUX_CTRL
29
30
31
32
33
34
35
36
37
38
39
40
LDO_VIN
NC
BOOT1
UGATE1
PHASE1
LGATE1
PVCC
LGATE2
PHASE2
UGATE2
BOOT2
NC
41 (Exposed Pad) GND
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
4
DS3668EB-05
August 2019
RT3668EB
Functional Block Diagram
SVC
VRHOT_L
PWROK
PGOOD
VDDIO
VSEN
TSEN
SET1
VCC
UVLO
SVD
SVT
MUX
ADC
SVI2 Interface
Configuration Registers
Control Logic
AI_GFX
QR_TH
TONSET
OFFSET
PHOCP_TH
IMONI
EN
GND
From Control Logic
RGND
DAC
Soft-Start &
Slew Rate Control
FB
COMP
1.867m
ISEN1P
ISEN1N
VREF_PINSET
ISEN2P
ISEN2N
IMON
+
-
Loop Control
Protection Logic
VSET
ERROR
AMP
+
-
VIN
Offset
Cancellation
+
+
-
PWM
CMP
QR_TH
BOOTx
TON
GEN
PWM1
PWM2
Driver
UGATEx
PHASEx
LGATEx
IB1
0.75 x AI_GFX
+
-
RAMP
TONSET
1.867m
+
-
IB2
IMONI
+
VSEN
OV/UV
OC
Current
Balance
IB1
IB2
Driver
POR
PVCC
OCP_SPIKE
MUX_CTRL
VSEN_NB_IN
40mV
LDO_OUT
+
-
-
To Protection Logic
LDO
VCC
0.4V
LDO_VIN
CMP
+
-
OP
10mV
+
-
+
-
LDO_OUT
VSEN_NB_IN
0
POWER
_MUX
1
LDO_OUT
FBA
S5_OUT
Operation
The RT3668EB adopts G-NAVP
TM
(Green Native AVP)
which is Richtek's proprietary topology derived from
finite DC gain of EA amplifier with current mode control,
making it easy to set the droop to meet all AMD GFX
requirements of AVP (Adaptive Voltage Positioning).
The G-NAVP
TM
MUX and ADC
The MUX supports the inputs from SET1, TSEN,
IMONI and VSEN. The ADC converts these analog
signals to digital codes for reporting or performance
adjustment.
SVI2 Interface/Configuration Registers/Control
Logic
The SVI2 interface uses the SVC, SVD, and SVT pins
to communicate with GFX. The configuration registers
save the digital data from ADC output for reporting or
performance adjustment. The Control Logic controls
the ADC timing and generates the digital code of the
VID for VSEN voltage.
controller is one type of current mode
constant on-time control with DC offset cancellation.
The approach can not only improve DC offset problem
for increasing system accuracy but also provide fast
transient response. When current feedback signal
reaches COMP signal, it generates an on-time width
to achieve PWM modulation.
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS3668EB-05
August 2019
www.richtek.com
5