FLM7179-4F
C-Band Internally Matched FET
FEATURES
•
•
•
•
•
•
•
High Output Power: P1dB = 36.5dBm (Typ.)
High Gain: G1dB = 9.0dB (Typ.)
High PAE:
η
add = 35% (Typ.)
Low IM3 = -46dBc@Po = 25.5dBm
Broad Band: 7.1 ~ 7.9GHz
Impedance Matched Zin/Zout = 50Ω
Hermetically Sealed Package
DESCRIPTION
The FLM7179-4F is a power GaAs FET that is internally matched for
standard communication bands to provide optimum power and gain in a
50 ohm system.
Eudyna’s stringent Quality Assurance Program assures the highest
reliability and consistent performance.
ABSOLUTE MAXIMUM RATING (Ambient Temperature Ta=25°C)
Item
Drain-Source Voltage
Gate-Source Voltage
Total Power Dissipation
Storage Temperature
Channel Temperature
Symbol
VDS
VGS
PT
Tstg
Tch
Tc = 25°C
Condition
Rating
15
-5
25.0
-65 to +175
175
Unit
V
V
W
°C
°C
Fujitsu recommends the following conditions for the reliable operation of GaAs FETs:
1. The drain-source operating voltage (VDS) should not exceed 10 volts.
2. The forward and reverse gate currents should not exceed 16.0 and -2.2 mA respectively with
gate resistance of 100Ω.
ELECTRICAL CHARACTERISTICS (Ambient Temperature Ta=25°C)
Item
Saturated Drain Current
Transconductance
Pinch-off Voltage
Gate Source Breakdown Voltage
Output Power at 1dB G.C.P.
Power Gain at 1dB G.C.P.
Drain Current
Power-added Efficiency
Gain Flatness
3rd Order Intermodulation
Distortion
Thermal Resistance
Channel Temperature Rise
CASE STYLE:
IB
Symbol
IDSS
gm
Vp
VGSO
P1dB
G1dB
Idsr
η
add
∆G
IM3
Rth
∆T
ch
f = 7.9 GHz,
∆f
= 10 MHz
2-Tone Test
Pout = 25.5dBm S.C.L.
Channel to Case
10V x Idsr x Rth
VDS =10V,
IDS = 0.65 IDSS (Typ.),
f = 7.1 ~ 7.9 GHz,
ZS=ZL= 50 ohm
Test Conditions
VDS = 5V, VGS = 0V
VDS = 5V, IDS = 1100mA
VDS = 5V, IDS = 85mA
IGS = -85µA
Min.
-
-
-0.5
-5.0
35.5
8.0
-
-
-
-44
-
-
Limit
Typ. Max.
1700 2600
1700
-1.5
-
36.5
9.0
-
-3.0
-
-
-
Unit
mA
mS
V
V
dBm
dB
mA
%
dB
dBc
°C/W
°C
1100 1300
35
-
-46
5.0
-
-
±0.6
-
6.0
80
G.C.P.: Gain Compression Point, S.C.L.: Single Carrier Level
Edition 1.2
September 1999
1
FLM7179-4F
C-Band Internally Matched FET
POWER DERATING CURVE
30
OUTPUT POWER & IM3 vs. INPUT POWER
VDS=10V
f1 = 7.9 GHz
f2 = 7.91 GHz
2-tone test
Pout
Total Power Dissipation (W)
33
Output Power (S.C.L.) (dBm)
24
31
29
27
25
18
-10
-20
-30
6
IM3
23
21
-40
-50
0
50
100
150
200
12
14
16
18
20
22
Case Temperature (°C)
Input Power (S.C.L.) (dBm)
S.C.L.: Single Carrier Level
OUTPUT POWER vs. FREQUENCY
VDS=10V
P1dB
Output Power (dBm)
Pin=28.5dBm
OUTPUT POWER vs. INPUT POWER
VDS=10V
f = 7.5 GHz
38
38
36
34
32
30
28
Output Power (dBm)
37
26.5dBm
Pout
60
45
30
15
36
24.5dBm
35
η
add
34
22.5dBm
18
7.1
7.3
7.5
7.7
7.9
20
22
24
26
28
Input Power (dBm)
Frequency (GHz)
2
η
add (%)
IM3 (dBc)
12
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