Data Sheet
PT7M6118-6150(CL/CH /NL /CLL/NLL)
Voltage Detector
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Features
•
•
•
•
•
•
•
Highly accurate:
±1.5%
(25°C)
Low power consumption: 0.9uA @ 3V Vcc
Detect voltage range: 1.8 to 5V in 100mV increments
Operating voltage range: 1.2V ~ 5.5V
Operating temperature range: -40°C to + 85°C
Detect voltage accuracy over temperature:
±2.5% ×
Typ
Output configuration: N-channel open drain or
CMOS
Ordering Information
Part Number
PT7M61xxCLTA3E
PT7M61xxCLTA5E
PT7M61xxCLC3E
PT7M61xxCLC4E
PT7M61xxCLNBE
PT7M61xxCLTDE
PT7M61xxCHTA3E
PT7M61xxCHTA5E
PT7M61xxCHC3E
PT7M61xxCHTDE
PT7M61xxNLTA3E
PT7M61xxNLTA5E
PT7M61xxNLC3E
PT7M61xxNLC4E
PT7M61xxNLNBE
PT7M61xxNLTDE
PT7M61xxCLLNBE
PT7M61xxNLLNBE
PT7M61xxCLBTA5E
PT7M61xxCHBTA5E
PT7M61xxNLBTA5E
Package
Lead free and Green SOT23-3
Lead free and Green SOT23-5
Lead free and Green SC70-3
Lead free and Green SC70-4
Lead free TO92
Lead free SOT89
Lead free and Green SOT23-3
Lead free and Green SOT23-5
Lead free and Green SC70-3
Lead free SOT89
Lead free and Green SOT23-3
Lead free and Green SOT23-5
Lead free and Green SC70-3
Lead free and Green SC70-4
Lead free TO92
Lead free SOT89
Lead free TO92
Lead free TO92
Lead free and Green SOT23-5
Lead free and Green SOT23-5
Lead free and Green SOT23-5
Description
The PT7M61xx serials of ultra-low-power voltage
detectors monitor battery, power-supply and system
voltages. Each circuit includes a precision bandgap
reference, a comparator, internally trimmed resistor
networks that set specified trip thresholds, and an internal
5% threshold hysteresis circuit. Output is asserted when
V
CC
falls below the internal V
TH-
and remains asserted
until V
CC
rises above V
TH+
(V
TH+
= V
TH-
×1.05).
These
devices provide excellent circuit reliability and low cost
by eliminating external components and adjustments
when monitoring nominal system voltages from +1.8V to
+5V in 100mV increments. The series are voltage
detectors with a propagation delay of 17µs.
The family is available with three output stage options:
push-pull with active-low output, push-pull with active-
high output, and open drain with active-low output.
These devices specified over the -40°C to +85°C
temperature range.
Table 1 Suffix “xx” definition of PT7M61xx
Suffix xx
18
19
20
21
22
23
24
V
TH-
(V)
1.8
1.9
2.0
2.1
2.2
2.3
2.4
Suffix xx
25
26
27
28
29
30
31
V
TH-
(V)
2.5
2.6
2.7
2.8
2.9
3.0
3.1
Suffix xx
32
33
34
35
36
37
38
Note 1:
“xx” refer to voltage range, see below table 1.
V
TH-
(V)
3.2
3.3
3.4
3.5
3.6
3.7
3.8
Suffix xx
39
40
41
42
43
44
45
V
TH-
(V)
3.9
4.0
4.1
4.2
4.3
4.4
4.5
Suffix xx
46
47
48
49
50
V
TH-
(V)
4.6
4.7
4.8
4.9
5.0
PT0181(07/11)
1
Ver: 10
Data Sheet
PT7M6118-6150(CL/CH /NL /CLL/NLL)
Voltage Detector
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Table 2 Function comparison
Reset Output
Item
1
2
3
4
5
Part No.
PT7M61xxCL
PT7M61xxCLL
PT7M61xxCH
PT7M61xxNL
PT7M61xxNLL
Open-Drain
Active high
Active low
-
-
-
-
-
-
-
-
√
√
Push-Pull
Active high
Active low
-
√
-
√
-
-
√
-
-
-
Threshold
1.8V to 5.0V in 100mV
increments
Block Diagram
Block Diagram of PT7M61xxCL/CH/CLL
Vcc
-
+
RST / (RST)
(RST is for
61xxCH only)
GND
Reference
Voltage
1.25V
Block Diagram of PT7M61xxNL/NLL
Vcc
-
+
RST
GND
Reference
Voltage
1.25V
PT0181(07/11)
2
Ver: 10
Data Sheet
PT7M6118-6150(CL/CH /NL /CLL/NLL)
Voltage Detector
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Pin Configuration
PT0181(07/11)
3
Ver: 10
Data Sheet
PT7M6118-6150(CL/CH /NL /CLL/NLL)
Voltage Detector
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Pin Description
Name
Type
Description
111
Reset Output (PT7M61xxCL/NL/CLL/NLL):
RST is asserted when V
CC
drops below voltage threshold
V
TH-
. Active low.
Reset Output (PT7M61xxCH).
RST is asserted when V
CC
drops below voltage threshold V
TH-
. Active high.
Ground
Supply Voltage.
RST
O
RST
GND
V
CC
O
P
P
Typical Operation Circuit
PT7M61xxNL Application Example
V
IN
PT7M61xxNL
R
L
Vcc
GND
RST
Please use N-ch open drains configuration, when a resistor
RIN
is connected between the V
CC
pin and power source V
IN
.
In such cases, please ensure that R
IN
is less than 10kΩ and that C is more than 0.1µF. R
L
could be 1kΩ to 510kΩ.
PT0181(07/11)
4
Ver: 10
Data Sheet
PT7M6118-6150(CL/CH /NL /CLL/NLL)
Voltage Detector
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Maximum Ratings
Storage Temperature ............................................................-65
o
C to +150
o
C
Ambient Temperature with Power Applied.......................... -40
o
C to +85
o
C
Supply Voltage to Ground Potential (Vcc to GND) ..............-0.3V to +6.0V
DC Input Voltage (All inputs except Vcc and GND)......-0.3V to V
CC
+0.3V
DC Output Current (All outputs) ..........................................................20mA
Power Dissipation .......................................... 320mW (Depend on package)
ESD(HBM) for 61xxNL/NLL......................................................1KV
ESD(HBM) for 61xxCL/CH/CLL................................................2KV
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect reliability.
DC Electrical Characteristics
(V
CC
= 1.2V to 5.5V, T
A
= -40~85ºC, unless otherwise noted. Typical values are at T
A
= +25ºC)
Description
Supply Voltage
Sym.
V
CC
Test Conditions
T
A
= 0~70ºC
T
A
= -40~85ºC
V
CC
= 3V. No load.
V
CC
= 5V. No load.
Min
1.0
Typ
-
Max
5.5
Unit
V
µA
µA
1.2
-
-
-
0.9
1.3
-
-
-
-
-
-
-
5.5
3.0
3.6
-
-
-
0.3
0.3
0.4
1
(V
TH-
)
×1.02
(V
TH-
)
×1.025
(V
TH+
)
×1.02
(V
TH+
)
×1.025
Supply Current
I
CC
V
CC
≥
1.8V, I
source
= 1mA
Output high
Output
Driving
Output low
V
OL
V
OH
0.8×Vcc
0.8×Vcc
0.8×Vcc
-
-
-
-
(V
TH-
)
×0.98
(V
TH-
)
×0.975
(V
TH+
)
×0.98
(V
TH+
)
×0.975
V
CC
≥
2.5V, I
source
= 3mA
V
CC
≥
4.5V, I
source
= 8mA
V
CC
≥
1.2V, I
sink
= 1mA
V
CC
≥
2.5V, I
sink
= 4mA
V
CC
≥
4.5V, I
sink
= 9mA
V
V
Open-Drain Output
Leakage Current
I
LKG
V
TH-
-
+25°C
-40°C~85°C
µA
V
TH-
V
TH-
V
TH+
V
TH+
Voltage Threshold
+25°C
V
TH+
-40°C~85°C
voltage threshold Hysteresis
V
HYST
V
V
HYST
= [(V
TH+
)-(V
TH-
)]/(V
TH-
)
%
3
5
6
×100%
Note:
V
TH+
= 1.05
×
V
TH-
。
V
TH-
is voltage threshold when Vcc falls from high to low.
V
TH
＋
is voltage threshold when Vcc
rises from low to high.
PT0181(07/11)
5
Ver: 10
FPGA/CPLD
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