PCA2125
SPI Real-time clock/calendar
Rev. 01 — 28 July 2008
Product data sheet
1. General description
The PCA2125 is a CMOS real-time clock/calendar optimized for low-power consumption
and an operating temperature up to 125
°C.
Data is transferred via a Serial Peripheral
Interface (SPI) bus with a maximum data rate of 6.0 Mbit/s. An alarm and timer function
are also available with the possibility to generate a wake-up signal on an interrupt pin.
AEC Q100 qualified for automotive applications.
2. Features
I
Provides year, month, day, weekday, hours, minutes and seconds based on
32.768 kHz quartz crystal
I
Resolution: seconds to years
I
Clock operating voltage: 1.3 V to 5.5 V
I
Low backup current: typical 0.55
µA
at V
DD
= 3.0 V and T
amb
= 25
°C
I
3-line SPI-bus with separate combinable data input and output
I
Serial interface (at V
DD
= 1.6 V to 5.5 V)
I
1 second or 1 minute interrupt output
I
Freely programmable timer with interrupt capability
I
Freely programmable alarm function with interrupt capability
I
Integrated oscillator capacitor
I
Internal power-on reset
I
Open-drain interrupt pin
3. Applications
I
Automotive time keeping application
I
Metering
4. Ordering information
Table 1.
Ordering information
Package
Name
PCA2125TS
TSSOP14
Description
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT402-1
Type number
NXP Semiconductors
PCA2125
SPI Real-time clock/calendar
5. Marking
Table 2.
Marking codes
Marking code
PCA2125
Type number
PCA2125TS
6. Block diagram
OSCI
OSCILLATOR
32.768 kHz
OSCO
MONITOR
00h
01h
0Dh
POWER-ON
RESET
TIME
02h
V
DD
V
SS
03h
04h
05h
06h
07h
WATCH-
DOG
08h
Seconds
Minutes
Hours
Days
Weekdays
Months
Years
CONTROL
Control_1
Control_2
CLKOUT_control
DIVIDER
CLOCK OUT
CLKOUT
ALARM FUNCTION
09h
SDO
SDI
SCL
CE
TIMER FUNCTION
SPI
INTERFACE
0Ah
0Bh
0Ch
Minute_alarm
Hour_alarm
Day_alarm
Weekday_alarm
INTERRUPT
INT
PCA2125
0Eh
0Fh
Timer_control
Countdown_timer
001aah664
Fig 1.
Block diagram of PCA2125
PCA2125_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 28 July 2008
2 of 36
NXP Semiconductors
PCA2125
SPI Real-time clock/calendar
7. Pinning information
7.1 Pinning
OSCI
OSCO
n.c.
n.c.
INT
CE
V
SS
1
2
3
4
5
6
7
001aaf892
14 V
DD
13 CLKOUT
12 n.c.
PCA2125
11 n.c.
10 SCL
9
8
SDI
SDO
Fig 2.
Pin configuration for TSSOP14
7.2 Pin description
Table 3.
Symbol
OSCI
OSCO
n.c.
INT
CE
V
SS
SDO
SDI
SCL
n.c.
CLKOUT
V
DD
Pin description
Pin
1
2
3, 4
5
6
7
8
9
10
11, 12
13
14
Description
oscillator input
oscillator output
not connected; do not connect and do not use as feed through; connect
to V
DD
if floating pins are not allowed
interrupt output (open-drain; active LOW)
chip enable input (active HIGH) with 200 kΩ pull-down resistor
ground
serial data output, push-pull
serial data input; might float when CE inactive
serial clock input; might float when CE inactive
not connected; do not connect and do not use as feed through; connect
to V
DD
if floating pins are not allowed
clock output (open-drain)
supply voltage
8. Functional description
The PCA2125 contains sixteen 8-bit registers with an auto-incrementing address register,
an on-chip 32.768 kHz oscillator with one integrated capacitor, a frequency divider which
provides the source clock for the Real-Time Clock (RTC), a programmable clock output,
and a 6 MHz SPI-bus.
All sixteen registers are designed as addressable 8-bit parallel registers although not all
bits are implemented:
PCA2125_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 28 July 2008
3 of 36
NXP Semiconductors
PCA2125
SPI Real-time clock/calendar
•
The first two registers at addresses 00h and 01h (Control_1 and Control_2) are used
as control registers.
•
Registers at addresses 02h to 08h (Seconds, Minutes, Hours, Days, Weekdays,
Months, Years) are used as counters for the clock function. Seconds, minutes, hours,
days, months and years are all coded in Binary Coded Decimal (BCD) format. When
one of the RTC registers is read the contents of all counters are frozen. Therefore,
faulty reading of the clock/calendar during a carry condition is prevented.
•
Registers at addresses 09h to 0Ch (Minute_alarm, Hour_alarm, Day_alarm,
Weekday_alarm) define the alarm condition.
•
Register at address 0Dh (CLKOUT_control) defines the clock out mode.
•
Registers at addresses 0Eh and 0Fh (Timer_control and Countdown_timer) are used
for the countdown timer function. The countdown timer has four selectable source
clocks allowing for countdown periods in the range from less than 1 ms to more than 4
hours. There are also two pre-defined timers which can be used to generate an
interrupt once per second or once per minute. These are defined in register Control_2
(01h).
8.1 Register overview
The time registers are encoded in BCD to simplify application use. Other registers are
either bit-wise or standard binary.
Table 4.
Register overview
Bits labeled ‘-’ are not implemented and will return a logic 0 when read. Bit positions labeled ‘0’ should always be written with
logic 0.
Address Register name
7
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
[1]
Bit
6
0
SI
5
STOP
MSF
SECONDS
[1]
MINUTES
[1]
-
-
-
-
-
-
-
YEARS
[1]
AEN_M
AEN_H
AEN_D
AEN_W
-
TE
-
-
-
-
-
-
-
-
-
MINUTE_ALARM
[1]
AMPM
HOUR_ALARM
[1]
HOUR_ALARM
[2]
DAY_ALARM
[1]
-
-
-
COUNTDOWN_TIMER
-
-
-
-
AMPM
HOURS
[1]
HOURS
[2]
DAYS
[1]
-
MONTHS
[1]
-
4
0
TI_TP
3
POR_OVRD
AF
2
12_24
TF
SECONDS
MINUTES
HOURS
HOURS
DAYS
WEEKDAYS
MONTHS
YEARS
MINUTE_ALARM
HOUR_ALARM
HOUR_ALARM
DAY_ALARM
WEEKDAY_ALARM
COF
CTD
1
0
AIE
0
0
TIE
EXT_TEST
MI
RF
-
-
-
-
-
-
Control_1
Control_2
Seconds
Minutes
Hours
Days
Weekdays
Months
Years
Minute_alarm
Hour_alarm
Day_alarm
Weekday_alarm
CLKOUT_control
Timer_control
Countdown_timer
Ten’s place.
PCA2125_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 28 July 2008
4 of 36
NXP Semiconductors
PCA2125
SPI Real-time clock/calendar
[2]
Ten’s place in 24 h mode.
8.2 Reset
The PCA2125 includes an internal reset circuit which is active whenever the oscillator is
stopped; see
Figure 3.
The oscillator can be stopped, for example, by connecting one of
the oscillator pins OSCI or OSCO to ground.
OSCILLATOR
osc stopped
0 = stopped, 1 = running
reset
SDI
POR
OVERRIDE
CLEAR
Bit
POR_OVRD
0 = override inactive
1 = override active
CE
0 = clear override mode
1 = override possible
001aaf898
Fig 3.
Reset system
The oscillator is considered to be stopped during the time between power-up and stable
crystal resonance; see
Figure 4.
This time can be in the range 200 ms to 2 s depending
on crystal type, temperature and supply voltage. Whenever an internal reset occurs, the
reset flag bit RF is set.
chip in reset
chip not in reset
V
DD
oscillation
internal
reset
t
001aaf897
Fig 4.
Power-on reset
Table 5.
Register reset value
Bits labeled ‘-’ are not implemented and will return a ‘0’ when read. Bits labeled ‘X’ are undefined at
power-up and unchanged by subsequent resets.
Address
00h
01h
02h
03h
04h
05h
06h
PCA2125_1
Register name
7
Control_1
Control_2
Seconds
Minutes
Hours
Days
Weekdays
0
0
1
-
-
-
-
6
0
0
X
X
-
-
-
5
0
0
X
X
X
X
-
4
-
0
X
X
X
X
-
Bit
3
1
0
X
X
X
X
-
2
0
0
X
X
X
X
X
1
-
0
X
X
X
X
X
0
-
0
X
X
X
X
X
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 28 July 2008
5 of 36
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
