VIV0105THJ
PRELIMINARY DATASHEET
S
C
NRTL
US
VTM
DC to DC
Voltage Transformation
TM
FEATURES
•
40 Vdc – 5 Vdc 20 A Voltage Transformation Module
- Operating from standard 48 V or 24 V PRMs
•
High efficiency (>94%) reduces system power
consumption
•
High density (133 A/in
3
)
•
“Half Chip” V•I Chip package enables surface mount,
low impedance interconnect to system board
•
Contains built-in protection features:
-
-
-
-
Overvoltage lockout
Overcurrent
Short circuit
Over temperature protection
•
Provides enable/disable control, internal temperature
monitoring, current monitoring
•
ZVS/ZCS resonant Sine Amplitude Converter topology
•
Less than 50ºC temperature rise at full load
in typical applications
TYPICAL APPLICATION
DESCRIPTION
The V
•
I Chip Voltage Transformation Module is a high efficiency
(>94%) Sine Amplitude Converter (SAC)
TM
operating from a 26
to 48 Vdc primary bus to deliver an isolated 5 V secondary. The
Sine Amplitude Converter offers a low AC impedance beyond
the bandwidth of most downstream regulators, which means
that capacitance normally at the load can be located at the
input to the Sine Amplitude Converter. Since the K factor of the
VIV0105THJ is 1/8, that capacitance value can be reduced by a
factor of 64x, resulting in savings of board area, materials and
total system cost.
The VIV0105THJ is provided in a V
•
I Chip package compatible
with standard pick-and-place and surface mount assembly
processes. The V
•
I Chip package provides flexible thermal
management through its low junction-to-case and junction-to-
board thermal resistance. With high conversion efficiency the
VIV0105THJ increases overall system efficiency and lowers
operating costs compared to conventional approaches.
The VIV0105THJ enables the utilization of Factorized Power
Architecture providing efficiency and size benefits by lowering
conversion and distribution losses and promoting high density
point of load conversion.
•
High End Computing Systems
•
Automated Test Equipment
•
Telecom Base Stations
•
High Density Power Supplies
•
Communication Systems
TYPICAL APPLICATION
PR
PC
TM
IL
VC
SG
OS
CD
V
IN
= 26 – 48 V
V
OUT
= 3.25 – 6.00 V (
NO LOAD
)
I
OUT
= 20 A(
NOM
)
K = 1/8
PRM
+Out
+In
IM
TM
VC
PC
-In
+Out
+In
V
IN
-In
-Out
VTM
-Out
L
O
A
D
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.5
9/2009
Page 1 of 16
VIV0105THJ
PRELIMINARY DATASHEET
ABSOLUTE MAXIMUM RATINGS
+IN to –IN . . . . . . . . . . . . . . . . . . . . . . . . . -1.0 Vdc – +53 Vdc
PC to –IN . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 Vdc – +20 Vdc
TM to –IN . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 Vdc – +7.0 Vdc
+IN/-IN to +OUT/-OUT . . . . . . . . . . . . . . . . . . . 2250 V (Hi Pot)
+IN/-IN to +OUT/-OUT . . . . . . . . . . . . . . . . . . . . 60 V (working)
+OUT to –OUT . . . . . . . . . . . . . . . . . . . . . . -1.0 Vdc - +10 Vdc
Temperature during reflow . . . . . . . . . . . . . . . . . 225°C (MSL5)
PACKAGE ORDERING INFORMATION
4
A
3
2
1
CONTROL PIN SPECIFICATIONS
See section 5.0 for further application details and guidelines
.
PC (V
•
I Chip VTM Primary Control)
The PC pin can enable and disable the VTM. When held below
2.0 V the VTM will be disabled. When allowed to float with an
impedance to –IN of greater than 60 kΩ the module will start.
The PC pin is capable of being driven high either by an external
logic signal or internal pull up to 5 V (operating).
TM (V
•
I Chip VTM Temperature Monitor)
The TM pin monitors the internal temperature of the VTM
within an accuracy of ±5 °C. It has a room temperature
setpoint of ~3.0 V and an approximate gain of 10 mV/°C. It
can source up to 100 µA and may also be used as a “Power
Good” flag to verify that the VTM is operating.
IM (V•I Chip Current Monitor)
The IM pin provides a DC analog voltage proportional to the
output current of the VTM. This voltage varies between 0.3
and 2.1 V and represents VTM output current within 25% of
the actual value under all operating line temperature conditions
between 50% and 100% load.
VC (VTM Control)
In typical applications the VC pin of the VTM is tied to the VC
pin of the PRMTM Regulator. In these applications the PRM
provides a temporary VC voltage during startup synchronizing
the output rise of the two devices. In addition, the VC port
provides feedback to the PRM on to its output resistance
through an internal resistor.
For applications which do not use a PRM, a voltage between 12 V
and 17 V must be applied to VC in order to enable the VTM.
+In
+Out
B
C
D
J
K
E
F
G
H
-Out
L
M
IM
TM
VC
PC
-In
Bottom View
Signal
Name
+In
–In
IM
TM
VC
PC
+Out
–Out
Designation
A1-B1, A2-B2
L1-M1, L2-M2
E1
F2
G1
H2
A3-D3, A4-D4
J3-M3, J4-M4
PART NUMBER
VIV0105THJ
VIV0105MHJ
DESCRIPTION
-40°C – 125°C T
J
, J lead
-55°C – 125°C T
J
, J lead
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.5
9/2009
Page 2 of 16
VIV0105THJ
PRELIMINARY DATASHEET
1.0 ELECTRICAL CHARACTERISTICS
Specifications apply over all line and load conditions unless otherwise noted;
Boldface
specifications apply over the
temperature range of
-40°C < T
J
< 125°C (T-Grade);
All other specifications are at
T
J
= 25ºC
unless otherwise noted
ATTRIBUTE
Voltage range
dV/dt
No load power dissipation
Inrush Current Peak
DC Input Current
K Factor
SYMBOL
V
IN
dV
IN
/dt
P
NL
I
INR
-
P
I
IN
-
DC
K
I
OUT
-
AVG
I
OUT
-
PK
P
OUT
-
AVG
V
OUT
η
AMB
η
HOT
η
20%
R
OUT
-
AMB
R
OUT
-
HOT
R
OUT
-
COLD
C
OUT
F
SW
F
SW
-
RP
V
OUT
-
PP
C
OUT
= 0 µf, I
OUT
= 20 A V
IN
= 42.4 V,
20 MHz BW, Section 8.0
1/8
20
30
132
6.12
93.7
92
14
17.3
12.3
18
22.5
16
1000
1.6
3.2
1.75
3.5
135
1.9
3.8
350
CONDITIONS / NOTES
No external VC applied
V
IN
= 42.4 V
V
IN
= 26 V to 48 V
VC enable, V
IN
= 42.4 V C
OUT
= 1,000 µF,
I
OUT
= 20 A
MIN
26
1.85
4.8
TYP
MAX
48
1
2.6
3.6
12
2.7
UNIT
Vdc
V/µs
W
W
A
A
V/V
A
A
W
V
%
%
%
mΩ
mΩ
mΩ
µF
MHz
MHz
mV
( )
V
OUT
V
IN
Output Current(average)
Output Current(Peak)
Output Power (average)
Output Voltage
Efficiency (Ambient)
Efficiency (Hot)
Efficiency (Over load range)
Output Resistance (Ambient)
Output Resistance (Hot)
Output Resistance (Cold)
Load Capacitance
Switching Frequency
Ripple Frequency
Output Voltage Ripple
PC
PC Voltage (Operating)
PC Voltage (Enable)
PC Voltage (Disable)
PC Source Current (Startup)
PC Source Current (Operating)
PC Resistance (Internal)
PC Resistance (External)
PC Capacitance (Internal)
PC Disable Time
PC Fault Response Time
TM
TM Voltage (Ambient)
TM Gain
TM Source Current
TM Resistance (Internal)
TM Capacitance (External)
T
PEAK
<10 ms, I
OUT
_
AVG
≤
20 A
I
OUT
_
AVG
≤
20 A
Section 3.0
V
IN
= 42.4 V, T
J
=25ºC, I
OUT
= 20 A
V
IN
= 26 V to 48 V, T
J
= 25ºC I
OUT
= 20 A
V
IN
= 42.4 V, TJ = 100° C, I
OUT
= 20 A
4 A < I
OUT
< 20 A
T
J
= 25°C
T
J
= 125°C
T
J
= -40°C
VTM Standalone Operation.
V
IN
pre-applied, VC enable
2.73
92.2
88.5
90.5
85
10
12.1
8.6
V
PC
V
PC
-
EN
V
PC
-
DIS
I
PC
-
EN
I
PC
-
OP
R
PC
-
INT
R
PC
-
EXT
C
PC
-
INT
T
PC
-
DIS
T
FR
-
PC
4.7
2
50
Internal pull down resistor
Connected to –IN. Unit will not start
if below minimum value
Section 5.0
From fault to PC = 2.0 V
50
60
5
2.5
100
150
5.3
3
2.0
300
2
400
V
V
V
µA
mA
kΩ
kΩ
588
4
100
pF
µs
µs
V
TM
-
AMB
A
TM
I
TM
R
TM
-
INT
C
TM
-
EXT
T
J
= 27°C
2.95
3
10
40
3.05
100
50
50
Internal pull down resistor
25
V
mV/°C
µA
kΩ
pF
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.5
9/2009
Page 3 of 16
VIV0105THJ
PRELIMINARY DATASHEET
1.0 ELECTRICAL CHARACTERISTICS (CONT.)
Specifications apply over all line and load conditions unless otherwise noted;
Boldface
specifications apply over the
temperature range of
-40°C < T
J
< 125°C (T-Grade);
All other specifications are at
T
J
= 25ºC
unless otherwise noted
ATTRIBUTE
TM (CONT.)
TM Voltage Ripple
TM Fault Response Time
IM
IM Voltage (No Load)
IM Voltage (50%)
IM Voltage (Full Load)
IM Gain
IM Resistance (External)
VC
External VC Voltage
VC Slew Rate
VC Current Draw (steady-state)
VC Inrush Current
Internal VC Capacitance
Output Turn-On Delay (VC)
VC to PC Delay
VC Application Time
VC Internal Resistor
PROTECTION
Positive Going OVLO
UV Turn-Off
Output Overcurrent Trip
Short Circuit Protection
Trip Current
Thermal Shutdown Setpoint
Output Overcurrent
Response Time Constant
Short Circuit Protection
Response Time
Overvoltage Lockout
Response Time Constant
GENERAL SPECIFICATION
Isolation Voltage (Hi-Pot)
Working Voltage (IN – OUT)
Isolation Capacitance
Isolation Resistance
MTBF
Agency Approvals / Standards
V
VC
-
EXT
dVC/dt
I
VC
I
INR
-
VC
C
VC
-
INT
T
ON
T
VC
-
PC
T
VC
-
AP
R
VC
-
INT
Required for startup, and operation
below 26 V. See Section 5.0
Required for proper startup
VC = 14 V, Vin = 0
VC = 17 V, dVC/dt = 0.25 V/µs
VC = 0 V
V
IN
pre-applied, PC floating, VC enable,
C
PC
= 0 µF, C
OUT
= 1,000 µF
VC = 10.5 V to PC high, V
IN
= 0 V,
dVC/dt = 0.25 V/µs
Maximum application time of VC
12
0.0025
85
2.2
500
10
4.64
25
20
17
0.25
150
750
V
V/µs
mA
mA
µF
µs
µs
ms
kΩ
V
TM
-
PP
T
FR
-
TM
C
TM
= 0 µF, V
IN
= 42.4 V,
I
OUT
= 20 A, 20 MHz BW
From fault to TM = 1.5 V
120
10
200
mV
µs
SYMBOL
CONDITIONS / NOTES
MIN
TYP
MAX
UNIT
V
IM
-
NL
V
IM
-
50%
V
IM
-
FL
A
IM
R
IM
-
EXT
T
J
= 25ºC, V
IN
= 42.4 V, I
OUT
= 0
T
J
= 25ºC, V
IN
= 42.4 V, I
OUT
= 10 A
T
J
= 25ºC, V
IN
= 42.4 V, I
OUT
= 20 A
T
J
= 25ºC, V
IN
= 42.4 V, I
OUT
> 10 A
2.5
0.5
1.0
1.58
60
V
V
V
mV/A
MΩ
V
IN
_
OVLO
+
V
IN
_
UVTO
I
OCP
I
SCP
T
J
-
OTP
T
OCP
T
SCP
T
OVLO
48.6
No external VC applied, I
OUT
= 20 A
20.2
30
125
Effective internal RC filter
From detecton to cessation of switching
Effective internal RC filter
50.8
22
42
45
130
4.5
1
2.7
53
26
60
60
135
V
V
A
A
°C
ms
µs
µs
V
HIPOT
V
IN
-
OUT
C
IN
-
OUT
R
IN
-
OUT
2,250
Unpowered Unit
MIL HDBK 217F, 25ºC, Ground Benign
cTUVus
CE Mark
ROHS 6 of 6
1350
10
1750
4.5
60
2150
V
DC
V
pF
MΩ
MHrs
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.5
9/2009
Page 4 of 16
VIV0105THJ
No Load Power Dissipation vs. Line
No Load Power Dissipation (W)
3.5
3
2.5
2
1.5
1
26
28
30
32
34
36
38
40
42
44
46
48
PRELIMINARY DATASHEET
Full Load Efficiency vs. Case Temperature
95
Full Load Efficiency (%)
94
93
92
91
90
89
88
87
-40
-20
0
20
40
60
80
100
Input Voltage (V)
T
CASE
:
-40°C
25°C
100°C
V
IN
:
Case Temperature (°C)
26 V
40 V
48 V
Figure 1 –
No load power dissipation vs. V
IN
; T
CASE
Figure 2 –
Full load efficiency vs. temperature; V
IN
Efficiency & Power Dissipation -40°C Case
96
94
92
90
88
86
84
82
80
78
76
74
72
70
Efficiency & Power Dissipation 25°C Case
13
12
11
10
9
8
7
6
5
4
3
2
1
96
94
92
90
88
86
84
82
80
78
76
74
72
70
0
2
Power Dissipation (W)
P
D
P
D
0
2
4
6
8
10
12
14
16
18
20
4
6
8
10
12
14
16
18
20
Output Current (A)
V
IN
:
26 V
40 V
48 V
26 V
40 V
48 V
V
IN
:
26 V
Output Current (A)
40 V
48 V
26 V
40 V
48 V
Figure 3a –
Efficiency and power dissipation at -40°C (case); V
IN
Figure 3b –
Efficiency and power dissipation at 25°C (case); V
IN
Efficiency & Power Dissipation 100°C Case
96
94
92
90
88
86
84
82
80
78
76
74
72
70
0
2
R
OUT
vs. Case Temperature
13
12
11
10
9
8
7
6
5
4
3
2
1
0
18
Power Dissipation (W)
η
17
16
Efficiency (%)
Rout (mΩ)
15
14
13
12
11
10
-40
-20
0
20
40
60
80
100
P
D
4
6
8
10
12
14
16
18
20
Output Current (A)
V
IN
:
26 V
40 V
48 V
26 V
40 V
48 V
Case Temperature (°C)
I
OUT
:
2A
20 A
Figure 3c –
Efficiency and power dissipation at 100°C (case); V
IN
Figure 4 –
R
OUT
vs. temperature vs. I
OUT
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.5
9/2009
Page 5 of 16
Power Dissipation (W)
η
η
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Efficiency (%)
Efficiency (%)
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
