VIV0007TFJ
®
C
S
US
C
NRTL
US
VTM
DC to DC
Voltage Transformer
TM
FEATURES
•
50 Vdc to 1.56 Vdc 115 A Voltage Transformer
- Operating from standard 48 V or 24 V PRM regulators
TM
•
130 A rated with reduced case temperature at 30°C
•
High efficiency (>91.5%) reduces system power
consumption
•
High density (103 A/in
2
)
•
“Full Chip” V
•
I Chip package enables surface mount,
low impedance interconnect to system board
•
Contains built-in protection features:
-
-
-
-
Overvoltage Lockout
Overcurrent
Short Circuit
Over Temperature
•
Provides enable / disable control, internal temperature
monitoring, current monitoring
•
ZVS / ZCS resonant Sine Amplitude Converter topology
•
Less than 50ºC temperature rise at full load
in typical applications
TYPICAL APPLICATION
DESCRIPTION
The V
•
I Chip Voltage Transformer is a high efficiency (>91.5%)
Sine Amplitude Converter (SAC)
TM
operating from a 26 to 55 Vdc
primary bus to deliver an isolated output. The Sine Amplitude
Converter offers a low AC impedance beyond the bandwidth of
most downstream regulators, which means that capacitance
normally at the load can be located at the input to the Sine
Amplitude Converter. Since the K factor of the VIV0007TFJ is
1/32, that capacitance value can be reduced by a factor of
1024, resulting in savings of board area, materials and total
system cost.
The VIV0007TFJ is provided in a V
•
I Chip package compatible
with standard pick-and-place and surface mount assembly
processes. The co-molded V
•
I Chip package provides enhanced
thermal management due to large thermal interface area and
superior thermal conductivity. With high conversion efficiency
the VIV0007TFJ increases overall system efficiency and lowers
operating costs compared to conventional approaches.
The VIV0007TFJ enables the utilization of Factorized Power
Architecture
TM
providing efficiency and size benefits by lowering
conversion and distribution losses and promoting high density
point of load conversion.
V
IN
= 26 to 55 V
V
OUT
= 0.81 to 1.71 V
(
NO LOAD
)
I
OUT
= 115 A
(
NOM
)
K = 1/32
•
High End Computing Systems
•
Automated Test Equipment
•
High Density Power Supplies
PART NUMBER
VIV0007TFJ
DESCRIPTION
-40°C to 125°C T
J
Regulator
PR
PC
TM
IL
VC
SG
OS
CD
Voltage Transformer
PC
VC
IM
TM
PRM
+Out
+In
VTM
+Out
+In
V
IN
-In
-Out
-In
-Out
L
O
A
D
Factorized Power Architecture
(See Application Note AN:024)
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1
7/2009
Page 1 of 18
VIV0007TFJ
1.0 ABSOLUTE MAXIMUM VOLTAGE RATINGS
PRELIMINARY DATASHEET
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent
damage to the device.
MIN
MAX
UNIT
MIN
MAX
UNIT
+ IN to - IN
. . . . . . . . . . . . . . . . . . . . . . .
PC to - IN
. . . . . . . . . . . . . . . . . . . . . . . .
TM to -IN
. . . . . . . . . . . . . . . . . . . . . . . .
VC to - IN
. . . . . . . . . . . . . . . . . . . . . . . .
-1.0
-0.3
-0.3
11.5
60
20
7.0
16.5
V
DC
V
DC
V
DC
V
DC
IM to - IN.................................................
+ IN / - IN to + OUT / - OUT (hipot)........
+ IN / - IN to + OUT / - OUT (working)...
+ OUT to - OUT.......................................
-1.0
0
3.15
100
60
5.5
V
DC
V
DC
V
DC
V
DC
2.0 ELECTRICAL CHARACTERISTICS
Specifications apply over all line and load conditions unless otherwise noted;
Boldface
specifications apply over the temperature
range of
-40°C < T
J
< 125°C (T-Grade);
All other specifications are at
T
J
= 25ºC
unless otherwise noted.
ATTRIBUTE
Input Voltage Range
V
IN
Slew Rate
V
IN
UV Turn Off
SYMBOL
V
IN
dV
IN
/dt
V
IN
_
UV
Module latched shutdown,
No external VC applied, I
OUT
= 115A
V
IN
= 50 V
V
IN
= 26 V to 55 V
V
IN
= 50 V, T
C
= 25ºC
V
IN
= 26 V to 55 V, T
C
= 25ºC
K = V
OUT
/ V
IN
, I
OUT
= 0 A
V
OUT
= V
IN
•
K - I
OUT
•
R
OUT
, Section 11
30°C < Tc < 100°C,
I
OUT
_
MAX
= - (3/14) * T
C
+ 136.43
T
C
= 30ºC
T
PEAK
<10 ms, I
OUT
_
AVG
≤
115 A
I
OUT
_
AVG
≤
115 A
V
IN
= 50 V, I
OUT
= 115 A
V
IN
= 26 V to 55 V, I
OUT
= 115 A
V
IN
= 50 V, I
OUT
= 57.5 A
V
IN
= 50 V, I
OUT
= 130 A
V
IN
= 50 V, T
c
= 100°C, I
OUT
= 115 A
23 A < I
OUT
< 115 A
T
C
= -40°C, I
OUT
= 115 A
T
C
= 25°C, I
OUT
= 115 A
T
C
= 100°C, I
OUT
= 115 A
18
2
4.59
CONDITIONS / NOTES
No external VC applied
VC applied
MIN
26
0
TYP
MAX
55
55
1
26
7.3
8.3
5.5
6.3
4.5
UNIT
V
DC
V/µs
V
No Load Power Dissipation
DC Input Current
Transfer Ratio
Output Voltage
Output Current (Average)
Output Current (Peak)
Output Power (Average)
Efficiency (Ambient)
P
NL
I
IN
_
DC
K
V
OUT
I
OUT
_
AVG
I
OUT
_
PK
P
OUT
_
AVG
W
A
V/V
V
A
A
W
%
1/32
115
130
200
185
89.3
81.7
90.3
88.9
88.3
80
0.55
0.8
0.9
1.48
2.96
90.4
91.5
90.1
89.9
0.855
1.01
1.175
1.56
3.12
170
150
360
1.1
1.16
1.45
1.65
3.3
200
η
AMB
η
HOT
η
20%
R
OUT
_
COLD
R
OUT
_
AMB
R
OUT
_
HOT
F
SW
F
SW
_
RP
V
OUT
_
PP
L
OUT
_
PAR
C
OUT
_
INT
Efficiency (Hot)
Efficiency (Over Load Range)
Output Resistance (Cold)
Output Resistance (Ambient)
Output Resistance (Hot)
Switching Frequency
Output Ripple Frequency
Output Voltage Ripple
Output Inductance (Parasitic)
Output Capacitance (Internal)
PROTECTION
OVLO
Overvoltage Lockout
Response Time
Output Overcurrent Trip
Short Circuit Protection Trip Current
Output Overcurrent Response
Time Constant
Short Circuit Protection Response Time
Thermal Shutdown Setpoint
%
%
mΩ
mΩ
mΩ
MHz
MHz
mV
pH
µF
C
OUT
= 0 F, I
OUT
= 115 A, V
IN
= 50 V,
20 MHz BW, Section 12
Frequency up to 30 MHz,
Simulated J-lead model
V
IN
_
OVLO
+
T
OVLO
I
OCP
I
SCP
T
OCP
T
SCP
T
J
_
OTP
Module latched shutdown
Effective internal RC filter
55.1
56.9
0.2
59.4
V
µs
138
250
Effective internal RC filter (Integrative).
From detection to cessation
of switching (Instantaneous)
125
178
6.5
1
130
250
A
A
ms
µs
135
ºC
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1
7/2009
Page 2 of 18
VIV0007TFJ
3.0 SIGNAL CHARACTERISTICS
PRELIMINARY DATASHEET
Specifications apply over all line and load conditions unless otherwise noted;
Boldface
specifications apply over the temperature
range of
-40°C < T
J
< 125°C (T-Grade);
All other specifications are at
T
J
= 25°C
unless otherwise noted.
VTM CONTROL : VC
• Used to wake up powertrain circuit.
• PRM VC can be used as valid wake-up signal source.
• A minimum of 11.5 V must be applied indefinitely for V
IN
< 26 V
• VC voltage may be continuously applied;
to ensure normal operation.
there will be no VC current drawn when V
IN
> 26 V.
• VC slew rate must be within range for a succesful start.
SIGNAL TYPE
STATE
ATTRIBUTE
External VC Voltage
Steady
VC Current Draw
ANALOG
INPUT
Start Up
I
VC
SYMBOL
V
VC
_
EXT
CONDITIONS / NOTES
Required for startup, and operation
below 26 V. See Section 7.
VC = 11.5 V, V
IN
= 0 V
VC = 11.5 V, V
IN
> 26 V
Fault mode. VC > 11.5 V
Required for proper startup;
0 ºC < T
C
< 100 ºC
Required for proper startup;
-40 ºC < T
C
< 100 ºC
VC = 16.5 V, dVC/dt = 0.25 V/µs
VC = 11.5 V to PC high, V
IN
= 0 V,
dVC/dt = 0.25 V/µs
VC = 0 V
MIN
11.5
0
0.001
0.0025
115
0
60
TYP
MAX UNIT
16.5
150
0
0.25
V/µs
0.25
250
75
1
125
mA
µs
µF
V
mA
VC Slew Rate
VC Inrush Current
VC to PC Delay
dVC/dt
I
INR
_
VC
T
VC
_
PC
C
VC
_
INT
Transitional
Internal VC Capacitance
PRIMARY CONTROL : PC
• The PC pin enables and disables the VTM.
• Module will shutdown when pulled low with an impedance
When held below 2.0 V, the VTM will be disabled.
less than 850
Ω.
• PC pin outputs 5 V during normal operation. PC pin is equal to 2.5 V
• In an array of VTMs, connect PC pin to synchronize startup.
during fault mode given V
IN
> 26 V and VC > 11.5 V.
• PC pin can't sink current and will not disable other module
• After successful start-up and under no fault condition, PC can be used as
during fault mode.
a 5 V regulated voltage source with a 2 mA maximum current.
SIGNAL TYPE
STATE
Steady
ATTRIBUTE
PC Voltage
PC Source Current
PC Resistance (Internal)
PC Source Current
PC Capacitance (Internal)
PC Resistance (External)
PC Voltage
PC Voltage (Disable)
PC Pull Down Current
PC Disable Time
PC Fault Response Time
SYMBOL
V
PC
I
PC
_
OP
R
PC
_
INT
I
PC
_
EN
C
PC
_
INT
R
PC
_
EXT
V
PC
_
EN
V
PC
_
DIS
I
PC
_
PD
T
PC
_
DIS
_
T
T
FR
_
PC
CONDITIONS / NOTES
MIN
4.7
Internal pull down resistor
Section 7
60
2
5.1
From fault to PC = 2.0 V
5
100
2.5
50
50
TYP
5
150
100
MAX UNIT
5.3
2
400
300
1000
3
2
V
mA
kΩ
µA
pF
kΩ
V
V
mA
µs
µs
ANALOG
OUTPUT
Start Up
Enable
DIGITAL
INPUT / OUPUT
Disable
Transitional
TEMPERATURE MONITOR : TM
• The TM pin monitors the internal temperature of the VTM controller IC
• The TM pin has a room temperature setpoint of 3 V
within an accuracy of ±5°C.
and approximate gain of 10 mV/°C.
• Can be used as a "Power Good" flag to verify that the VTM is operating.
SIGNAL TYPE
STATE
ATTRIBUTE
TM Voltage
TM Source Current
TM Gain
TM Voltage Ripple
Disable
DIGITAL OUTPUT
(FAULT FLAG)
Transitional
TM Voltage
TM Resistance (Internal)
TM Capacitance (External)
TM Fault Response Time
SYMBOL
V
TM
_
AMB
I
TM
A
TM
V
TM
_
PP
V
TM
_
DIS
R
TM
_
INT
C
TM
_
EXT
T
FR
_
TM
CONDITIONS / NOTES
T
J
controller = 27°C
MIN
2.95
TYP
3
10
C
TM
= 0 F, V
IN
= 50 V,
I
OUT
= 50 A
Internal pull down resistor
From fault to TM = 1.5 V
25
120
0
40
10
200
50
50
MAX UNIT
3.05
100
V
µA
mV/°C
mV
V
kΩ
pF
µs
ANALOG
OUTPUT
Steady
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1
7/2009
Page 3 of 18
VIV0007TFJ
3.0 SIGNAL CHARACTERISTICS (CONT.)
PRELIMINARY DATASHEET
Specifications apply over all line and load conditions unless otherwise noted;
Boldface
specifications apply over the temperature
range of
-40°C < T
J
< 125°C (T-Grade);
All other specifications are at
T
J
= 25°C
unless otherwise noted.
CURRENT MONITOR : IM
• The IM pin voltage varies between 0.2 V and 1.97 V representing the
output current within ±25% under all operating line temperature
conditions between 50% and 100%.
SIGNAL TYPE
STATE
ATTRIBUTE
IM Voltage (No Load)
IM Voltage (50%)
IM Voltage (Full Load)
IM Gain
IM Resistance (External)
SYMBOL
V
IM
_
NL
V
IM
_
50%
V
IM
_
FL
A
IM
R
IM
_
EXT
• The IM pin provides a DC analog voltage proportional to
the output current of the VTM.
CONDITIONS / NOTES
T
J
= 25ºC, V
IN
= 50 V, I
OUT
= 0 A
T
J
= 25ºC, V
IN
= 50 V, I
OUT
= 57.5 A
T
J
= 25ºC, V
IN
= 50 V, I
OUT
= 115 A
T
J
= 25ºC, V
IN
= 50 V, I
OUT
> 57.5 A
MIN
0.2
TYP
0.25
0.95
1.97
18
MAX
0.3
UNIT
V
V
V
mV/A
MΩ
ANALOG
OUTPUT
Steady
2.5
4.0 TIMING DIAGRAM
I
OUT
I
SCP
I
OCP
1
2 3
b
6
7
4
5
d
g
8
VC
V
VC-EXT
a
V
OVLO
Vin
NL
≥ 26 V
c
e
Vout
TM
V
TM-amb
PC
5V
3V
f
a: VC slew rate (dVC/dt)
b: Minimum VC pulse rate (see section 5)
c: T
OVLO
d: T
OCP
e: PC disable time (T
PC
-dis)
f: VC to PC delay
g: T
SCP
1. Initiated V
C
pulse
2. Controller start
3. V
IN
ramp up
4. V
IN
= V
OVLO
5. V
IN
ramp down no V
C
pulse
6. Overcurrent
7. Start up on short circuit
8. PC driven low
Caution:
The module is not designed to start in this sequence.
Notes:
– Timing and voltage is not to scale
– Error pulse width is load dependent
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1
7/2009
Page 4 of 18
VIV0007TFJ
5.0 APPLICATION CHARACTERISTICS
PRELIMINARY DATASHEET
The following values, typical of an application environment, are collected at
T
J
= 25ºC
unless otherwise noted. See associated figures
for general trend data.
ATTRIBUTE
No Load Power Dissipation
Efficiency (Ambient)
Efficiency (Hot)
Output Resistance (Ambient)
Output Resistance (Hot)
Output Resistance (Cold)
Output Voltage Ripple
V
OUT
Transient (Positive)
V
OUT
Transient (Negative)
SYMBOL
P
NL
η
AMB
η
HOT
R
OUT
_
AMB
R
OUT
_
HOT
R
OUT
_
COLD
V
OUT
_
PP
V
OUT
_
TRAN
+
V
OUT
_
TRAN
-
CONDITIONS / NOTES
V
IN
= 49 V, PC enabled
V
IN
= 49 V, I
OUT
= 115 A
V
IN
= 49 V, I
OUT
= 115 A
V
IN
= 49 V
V
IN
= 49 V
V
IN
= 49 V
C
OUT
= 0 F, I
OUT
= 115 A, V
IN
= 50 V,
20 MHz BW, Section 12
I
OUT
_
STEP
= 0 A
TO
130A, V
IN
= 50 V,
I
SLEW
>10 A /us
I
OUT
_
STEP
= 130 A to 0 A, V
IN
= 50 V
I
SLEW
> 10 A /us
TYP
3.8
90.4
89.4
1.03
1.21
0.89
167
120
160
UNIT
W
%
%
mΩ
mΩ
mΩ
mV
mV
mV
No Load Power Dissipation vs. Line Voltage
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
26
29
32
36
39
42
45
49
52
55
94
92
115 A Load Efficiency vs. T
CASE
Power Dissipation (W)
Efficiency (%)
90
88
86
84
82
80
78
-40
-20
0
20
40
60
80
100
Input Voltage (V)
T
CASE
:
-40°C
25°C
100°C
V
IN
:
Case Temperature (°C)
26 V
49 V
55 V
Figure 1 –
No load power dissipation vs. V
IN
Figure 2 –
Full load efficiency vs. temperature
Efficiency & Power Dissipation -40°C Case
94
94
Efficiency & Power Dissipation 25°C Case
Power Dissipation (W)
Power Dissipation (W)
90
90
η
η
Efficiency (%)
86
82
78
74
70
66
0
26
26 V
49 V
52
55 V
78
26 V
104
49 V
24
20
16
12
8
4
0
130
Efficiency (%)
86
82
78
74
70
66
0
26
26 V
49 V
52
55 V
78
26 V
104
49 V
24
20
16
12
8
4
0
130
P
D
P
D
Load Current [A]
V
IN
:
55 V
V
IN
:
Load Current (A)
55 V
Figure 3 –
Efficiency and power dissipation at –40°C
Figure 4 –
Efficiency and power dissipation at 25°C
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1
7/2009
Page 5 of 18
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