SSF3606
DESCRIPTION
The SSF3606 uses advanced trench
technology to provide excellent R
DS(ON)
and low gate charge .This device is
suitable for use as a load switch or in
PWM applications.
G
D
S
Schematic diagram
GENERAL FEATURES
●
V
DS
= 30V,I
D
=15A
R
DS(ON)
< 8.5mΩ @ V
GS
=4.5V
R
DS(ON)
< 6mΩ @ V
GS
=10V
●
High Power and current handing capability
●
Lead free product is acquired
●
Surface Mount Package
Marking and pin Assignment
Application
●PWM
applications
●Load
switch
●Power
management
SOP-8 top view
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
SSF3606
Device
SSF3606
Device Package
SOP-8
Reel Size
Ø330mm
Tape width
12mm
Quantity
3000 units
ABSOLUTE MAXIMUM RATINGS(TA=25℃unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
Gate-Source Voltage
Limit
30
±20
15
12.5
60
2
-55 To 150
Unit
V
V
A
A
A
W
℃
V
DS
V
GS
I
D
(25
℃
)
I
D
(70
℃
)
I
DM
P
D
T
J
,T
STG
Drain Current-Continuous@ Current-Pulsed (Note 1)
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
THERMAL CHARACTERISTICS
Thermal Resistance,Junction-to-Ambient (Note 2)
R
θJA
62.5
℃/W
ELECTRICAL CHARACTERISTICS (TA=25℃unless otherwise noted)
Parameter
Symbol
Condition
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
BV
DSS
V
GS
=0V I
D
=250μA
Min
30
Typ
Max
Unit
V
©Silikron Semiconductor CO.,LTD.
1
http://www.silikron.com
v1.1
SSF3606
Zero Gate Voltage Drain Current
Gate-Body Leakage Current
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Drain-Source On-State Resistance
Forward Transconductance
DYNAMIC CHARACTERISTICS (Note4)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 4)
Turn-on Delay Time
Turn-on Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
DRAIN-SOURCE DIODE CHARACTERISTICS
Diode Forward Voltage (Note 3)
V
SD
V
GS
=0V,I
S
=2.8A
0.75
1.2
V
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
T
rr
Q
rr
I
F
=15A, dI/dt=100A/µs
V
DS
=15V,I
D
=15A,V
GS
=10V
V
DS
=15V,V
GS
=10V,R
GEN
=6Ω
I
D
=1A
19
11
60
25
50
8
15
20
5
nS
nS
nS
nS
nC
nC
nC
nS
nC
C
lss
C
oss
C
rss
V
DS
=15V,V
GS
=0V,
F=1.0MHz
3100
550
300
PF
PF
PF
V
GS(th)
R
DS(ON)
g
FS
V
DS
=V
GS
,I
D
=250μA
V
GS
=4.5V, I
D
=11.5A
V
GS
=10V, I
D
=15A
V
DS
=5V,I
D
=11A
1.3
1.7
6.4
4.8
25
2.5
8.5
6
V
mΩ
mΩ
S
I
DSS
I
GSS
V
DS
=30V,V
GS
=0V
V
GS
=±20V,V
DS
=0V
1
±100
μA
nA
NOTES:
1.
Repetitive Rating: Pulse width limited by maximum junction temperature.
2.
Surface Mounted on 1in
2
FR4 Board, t
≤
10 sec.
3.
Pulse Test: Pulse Width
≤
300μs, Duty Cycle
≤
2%.
4.
Guaranteed by design, not subject to production testing.
©Silikron Semiconductor CO.,LTD.
2
http://www.silikron.com
v1.1
SSF3606
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
t
on
t
r
90%
Vdd
Rl
D
G
Vout
t
d(on)
t
d(off)
t
off
t
f
90%
Vin
Vgs
Rgen
V
OUT
10%
INVERTED
10%
90%
V
IN
S
10%
50%
50%
PULSE WIDTH
Figure 1:Switching Test Circuit
Figure 2:Switching Waveforms
T
J
-Junction Temperature(℃)
I
D
- Drain Current (A)
P
D
Power(W)
T
J
-Junction Temperature(℃)
Figure 3 Power Dissipation
Figure 4 Drain Current
Rdson On-Resistance(mΩ)
I
D
- Drain Current (A)
Vds Drain-Source Voltage (V)
I
D
- Drain Current (A)
Figure 5 Output CHARACTERISTICS
Figure 6 Drain-Source On-Resistance
©Silikron Semiconductor CO.,LTD.
3
http://www.silikron.com
v1.1
SSF3606
Normalized On-Resistance
Vgs Gate-Source Voltage (V)
I
D
- Drain Current (A)
T
J
-Junction Temperature(℃)
Figure 7 Transfer Characteristics
Figure 8 Drain-Source On-Resistance
Rdson On-Resistance(mΩ)
Vgs Gate-Source Voltage (V)
C Capacitance (pF)
Vds Drain-Source Voltage (V)
Figure 9 Rdson vs Vgs
Figure 10 Capacitance vs Vds
Vgs Gate-Source Voltage (V)
I
s
- Reverse Drain Current (A)
Qg Gate Charge (nC)
Vsd Source-Drain Voltage (V)
Figure 11 Gate Charge
Figure 12 Source- Drain Diode Forward
4
©Silikron Semiconductor CO.,LTD.
http://www.silikron.com
v1.1
SSF3606
I
D
- Drain Current (A)
Vds Drain-Source Voltage (V)
Figure 13
Safe Operation Area
r(t),Normalized Effective
Transient Thermal Impedance
Square Wave Pluse Duration(sec)
Figure 14 Normalized Maximum Transient Thermal Impedance
©Silikron Semiconductor CO.,LTD.
5
http://www.silikron.com
v1.1