SSM6L35FE
TOSHIBA Field-Effect Transistor Silicon N / P Channel MOS Type
SSM6L35FE
○
High-Speed Switching Applications
○
Analog Switch Applications
•
•
•
N-ch: 1.2-V drive
P-ch: 1.2-V drive
1.6±0.05
Unit: mm
1.6±0.05
1.2±0.05
N-ch, P-ch, 2-in-1
Low ON-resistance Q1 N-ch: R
on
= 20
Ω
(max) (@V
GS
= 1.2 V)
: R
on
=
: R
on
=
: R
on
=
8
Ω
(max) (@V
GS
= 1.5 V)
4
Ω
(max) (@V
GS
= 2.5 V)
3
Ω
(max) (@V
GS
= 4.0 V)
1.0±0.05
0.5 0.5
1
2
3
6
5
4
0.2±0.05
0.12±0.05
1.Source1 4.Source2
2.Gate1
3.Drain2
5.Gate2
6.Drain1
: R
on
= 22
Ω
(max) (@V
GS
= -1.5 V)
: R
on
= 11
Ω
(max) (@V
GS
= -2.5 V)
: R
on
=
8
Ω
(max) (@V
GS
= -4.0 V)
Q1
Absolute Maximum Ratings (Ta
=
25°C)
Characteristics
Drain–source voltage
Gate–source voltage
Drain current
DC
Pulse
Symbol
V
DSS
V
GSS
I
D
I
DP
Rating
20
±10
180
360
Unit
V
V
mA
ES6
JEDEC
JEITA
TOSHIBA
0.55±0.05
Q2 P-ch: R
on
= 44
Ω
(max) (@V
GS
= -1.2 V)
-
-
2-2N1D
Weight: 3.0 mg (typ.)
Q2
Absolute Maximum Ratings (Ta
=
25°C)
Characteristics
Drain–source voltage
Gate–source voltage
Drain current
DC
Pulse
Symbol
V
DSS
V
GSS
I
D
I
DP
Rating
-20
±10
-100
-200
Unit
V
V
mA
Absolute Maximum Ratings (Ta = 25 °C) (Common to the Q1, Q2)
Characteristic
Drain power dissipation
Channel temperature
Storage temperature range
Symbol
P
D
(Note 1)
T
ch
T
stg
Rating
150
150
−55
to 150
Unit
mW
°C
°C
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: Total rating
Mounted on an FR4 board
2
(25.4 mm
×
25.4 mm
×
1.6 mm, Cu Pad: 0.135 mm
×
6)
1
2008-03-21
SSM6L35FE
Q1 Electrical Characteristics
(Ta
=
25°C)
Characteristics
Gate leakage current
Drain–source breakdown voltage
Drain cutoff current
Gate threshold voltage
Forward transfer admittance
Symbol
I
GSS
V
(BR) DSS
I
DSS
V
th
⏐Y
fs
⏐
Test Condition
V
GS
= ±10
V, V
DS
=
0V
I
D
=
0.1 mA, V
GS
=
0V
V
DS
=
20 V, V
GS
=
0V
V
DS
=
3 V, I
D
=
1 mA
V
DS
=
3 V, I
D
=
50 mA
I
D
=
50 mA, V
GS
=
4 V
Drain–source ON-resistance
R
DS (ON)
I
D
=
50 mA, V
GS
=
2.5 V
I
D
=
5 mA, V
GS
=
1.5 V
I
D
=
5 mA, V
GS
=
1.2 V
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time
Turn-on time
Turn-off time
C
iss
C
rss
C
oss
t
on
t
off
V
DSF
V
DD
=
3 V, I
D
=
50 mA,
V
GS
=
0 to 2.5 V
I
D
=
- 180 mA, V
GS
=
0V
(Note 2)
V
DS
=
3 V, V
GS
=
0V, f
=
1 MHz
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
Min
⎯
20
⎯
0.4
115
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Typ.
⎯
⎯
⎯
⎯
⎯
1.5
2
3
5
9.5
4.1
9.5
115
300
-0.9
Max
±10
⎯
1
1.0
⎯
3
4
8
20
⎯
⎯
⎯
⎯
⎯
-1.2
ns
V
pF
Ω
Unit
μA
V
μA
V
mS
Drain–source forward voltage
Q2 Electrical Characteristics
(Ta
=
25°C)
Characteristics
Gate leakage current
Drain–source breakdown voltage
Drain cutoff current
Gate threshold voltage
Forward transfer admittance
Symbol
I
GSS
V
(BR) DSS
I
DSS
V
th
⏐Y
fs
⏐
Test Condition
V
GS
= ±10
V, V
DS
=
0 V
I
D
=
-0.1 mA, V
GS
=
0 V
V
DS
=
-20 V, V
GS
=
0 V
V
DS
=
-3 V, I
D
=
-1 mA
V
DS
=
-3 V, I
D
=
-50 mA
I
D
=
-50 mA, V
GS
=
-4 V
Drain–source ON-resistance
R
DS (ON)
I
D
=
-50 mA, V
GS
=
-2.5 V
I
D
=
-5 mA, V
GS
=
-1.5 V
I
D
=
-2 mA, V
GS
=
-1.2 V
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time
Turn-on time
Turn-off time
C
iss
C
rss
C
oss
t
on
t
off
V
DSF
V
DD
=
-3 V, I
D
=
-50 mA,
V
GS
=
0 to -2.5 V
I
D
=
100 mA, V
GS
=
0 V
(Note 2)
V
DS
=
-3 V, V
GS
=
0 V, f
=
1 MHz
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
Min
⎯
-20
⎯
-0.4
77
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Typ.
⎯
⎯
⎯
⎯
⎯
4.3
5.6
8.2
11
12.2
6.5
10.4
175
251
0.83
Max
±10
⎯
-1
-1.0
⎯
8
11
22
44
⎯
⎯
⎯
⎯
⎯
1.2
ns
V
pF
Ω
Unit
μA
V
μA
V
mS
Drain–source forward voltage
Note 2: Pulse test
Marking
6
5
4
Equivalent Circuit
(top view)
6
5
4
LL3
1
2
3
1
Q1
Q2
2
3
2
2008-03-21
SSM6L35FE
Q1 Switching Time Test Circuit
(a) Test Circuit
2.5 V
0
10
μs
V
DD
=
3 V
D.U.
≤
1%
V
IN
: t
r
, t
f
<
5 ns
(Z
out
=
50
Ω)
Common Source
Ta
=
25°C
OUT
IN
0V
50
Ω
R
L
V
DD
10%
(b) V
IN
2.5 V
90%
(c) V
OUT
V
DD
10%
90%
t
r
t
on
t
off
t
f
V
DS (ON)
Q2 Switching Time Test Circuit
(a) Test Circuit
0
OUT
IN
−2.5
V
50Ω
R
L
V
DD
90%
(b) V
IN
0V
10%
−
2.5V
10
μs
(c) V
OUT
V
DS (ON)
90%
10%
t
r
t
on
t
off
t
f
V
DD
=
-3 V
D.U.
≤
1%
V
IN
: t
r
, t
f
<
5 ns
(Z
out
=
50
Ω)
Common Source
Ta
=
25°C
V
DD
Q1 Usage Considerations
Let V
th
be the voltage applied between gate and source that causes the drain current (I
D
) to below (1 mA for the Q1 of
the SSM6L35FE). Then, for normal switching operation, V
GS(on)
must be higher than V
th,
and V
GS(off)
must be lower
than V
th.
This relationship can be expressed as: V
GS(off)
< V
th
< V
GS(on).
Take this into consideration when using the device.
Q2 Usage Considerations
Let V
th
be the voltage applied between gate and source that causes the drain current (I
D
) to below (−1 mA for the Q2
of the SSM6L35FE). Then, for normal switching operation, V
GS(on)
must be higher than V
th,
and V
GS(off)
must be lower
than V
th.
This relationship can be expressed as: V
GS(off)
< V
th
< V
GS(on).
Take this into consideration when using the device.
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is
protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
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2008-03-21
SSM6L35FE
Q1 (N-ch MOSFET)
I
D
– V
DS
400
10 V
4V
2.5 V
Common Source
Ta
=
25°C
100
1000
Common Source
VDS
=
3 V
I
D
– V
GS
(mA)
300
1.8 V
(mA)
I
D
I
D
10
Ta
=
100°C
Drain current
Drain current
200
1.5 V
100
VGS
=
1.2 V
25°C
1
−25°C
0.1
0
0
0.5
1
1.5
2
0.01
0
1
2
3
Drain–source voltage
V
DS
(V)
Gate–source voltage
V
GS
(V)
R
DS (ON)
– V
GS
10
Common Source
ID
=
5 mA
10
R
DS (ON)
– V
GS
Common Source
ID
=
50 mA
Drain–source ON-resistance
R
DS (ON)
(Ω)
5
Drain–source ON-resistance
R
DS (ON)
(Ω)
5
25°C
Ta
=
100°C
−25°C
0
0
2
4
6
8
10
25°C
Ta
=
100°C
−25°C
0
0
2
4
6
8
10
Gate–source voltage
V
GS
(V)
Gate–source voltage
V
GS
(V)
R
DS (ON)
– I
D
10
Common Source
Ta
=
25°C
10
Common Source
R
DS (ON)
– Ta
Drain–source ON-resistance
R
DS (ON)
(Ω)
5
VGS
=
1.2 V
Drain–source ON-resistance
R
DS (ON)
(Ω)
5
VGS
=
1.2 V, ID
=
5 mA
1.5 V
2.5 V
4V
0
1
10
100
1000
1.5 V, 5 mA
2.5 V, 50 mA
4 V, 50 mA
0
−50
0
50
100
150
Drain current
I
D
(mA)
Ambient temperature
Ta
(°C)
4
2008-03-21
SSM6L35FE
Q1 (N-ch MOSFET)
V
th
– Ta
V
th
(V)
Common Source
ID
=
1 mA
VDS
=
3 V
⎪Y
fs
⎪
– I
D
(mS)
⎪Y
fs
⎪
Forward transfer admittance
1000
500
300
1.0
100
50
30
Gate threshold voltage
0.5
10
5
3
Common Source
VDS
=
3 V
Ta
=
25°C
10
100
1000
0
−50
0
50
100
150
1
1
Ambient temperature
Ta
(°C)
Drain current
I
D
(mA)
I
DR
– V
DS
1000
C – V
DS
100
50
(mA)
Common Source
VGS
=
0 V
D
I
DR
G
I
DR
Drain reverse current
10
C
Capacitance
10
Ciss
5
Common Source
VGS
=
0 V
f
=
1 MHz
Ta
=
25°C
1
Crss
Coss
S
25°C
Ta
=
100°C
1
−25°C
0.1
(pF)
100
0.01
0
0.1
0.5
1
5
10
50
100
−0.5
−1
−1.5
Drain–source voltage
V
DS
(V)
Drain–source voltage
V
DS
(V)
t – I
D
5000
3000 toff
Common Source
VDD
=
3 V
VGS
=
0 to 2.5 V
Ta
=
25°C
(ns)
1000
500
300
tf
Switching time
t
100
50
30
ton
tr
10
0.1
1
10
100
1000
Drain current
I
D
(mA)
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2008-03-21