SST49LF030A-33-4C-WHE,SST49LF030A-33-4C-WHE pdf中文资料,SST49LF030A-33-4C-WHE引脚图,SST49LF030A-33-4C-WHE电路-Datasheet-电子工程世界

Datasheet> 器件分类 > SST49LF030A-33-4C-WHE

文档预览

SST49LF030A-33-4C-WHE: 产品描述3 Mbit LPC Flash; 文件大小601KB，共49页; 制造商SST; 官网地址http://www.ssti.com

下载文档选型对比全文预览

SST49LF030A-33-4C-WHE概述

3 Mbit LPC Flash

文档预览

下载PDF文档

全文
预览

3 Mbit LPC Flash

SST49LF030A

D0490007: SST49LF030A3Mb LPC Flash

EOL Product Data Sheet

FEATURES:

• LPC Interface Flash

– SST49LF030A: 384K x8 (3 Mbit)

• Conforms to Intel LPC Interface Specification 1.0

• Flexible Erase Capability

– Uniform 4 KByte Sectors

– Uniform 64 KByte overlay blocks

– 64 KByte Top Boot Block protection

– Chip-Erase for PP Mode Only

• Single 3.0-3.6V Read and Write Operations

• Superior Reliability

– Endurance: 100,000 Cycles (typical)

– Greater than 100 years Data Retention

• Low Power Consumption

– Active Read Current: 6 mA (typical)

– Standby Current: 10 µA (typical)

• Fast Sector-Erase/Byte-Program Operation

– Sector-Erase Time: 18 ms (typical)

– Block-Erase Time: 18 ms (typical)

– Chip-Erase Time: 70 ms (typical)

– Byte-Program Time: 14 µs (typical)

– Chip Rewrite Time: 6 seconds (typical)

– Single-pulse Program or Erase

– Internal timing generation

• Two Operational Modes

– Low Pin Count (LPC) Interface mode for

in-system operation

– Parallel Programming (PP) Mode for fast production

programming

• LPC Interface Mode

– 5-signal communication interface supporting

byte Read and Write

– 33 MHz clock frequency operation

– WP# and TBL# pins provide hardware write protect

for entire chip and/or top boot block

– Standard SDP Command Set

– Data# Polling and Toggle Bit for End-of-Write

detection

– 5 GPI pins for system design flexibility

– 4 ID pins for multi-chip selection

• Parallel Programming (PP) Mode

– 11-pin multiplexed address and 8-pin data

I/O interface

– Supports fast programming In-System on

programmer equipment

• CMOS and PCI I/O Compatibility

• Packages Available

– 32-lead PLCC

– 32-lead TSOP (8mm x 14mm)

PRODUCT DESCRIPTION

The SST49LF030A flash memory device is designed to

interface with the LPC bus for PC and Internet Appliance

application in compliance with Intel Low Pin Count (LPC)

Interface Specification 1.0. Two interface modes are sup-

ported: LPC mode for in-system operations and Parallel

Programming (PP) mode to interface with programming

equipment.

The SST49LF030A flash memory device is manufactured

with SST’s proprietary, high-performance SuperFlash tech-

nology. The split-gate cell design and thick-oxide tunneling

injector attain better reliability and manufacturability com-

pared with alternate approaches. The SST49LF030A

device significantly improves performance and reliability,

while lowering power consumption. The SST49LF030A

device writes (Program or Erase) with a single 3.0-3.6V

power supply. It uses less energy during Erase and Pro-

gram than alternative flash memory technologies. The total

energy consumed is a function of the applied voltage, cur-

rent and time of application. For any give voltage range, the

SuperFlash technology uses less current to program and

has a shorter erase time; the total energy consumed during

any Erase or Program operation is less than alternative

flash memory technologies. The SST49LF030A product

provides a maximum Byte-Program time of 20 µsec. The

entire memory can be erased and programmed byte-by-

byte typically in 6 seconds when using status detection fea-

tures such as Toggle Bit or Data# Polling to indicate the

completion of Program operation. The SuperFlash technol-

ogy provides fixed Erase and Program time, independent

of the number of Erase/Program cycles that have per-

formed. Therefore the system software or hardware does

not have to be calibrated or correlated to the cumulative

number of Erase cycles as is necessary with alternative

flash memory technologies, whose Erase and Program

time increase with accumulated Erase/Program cycles.

To meet high density, surface mount requirements, the

SST49LF030A device is offered in 32-lead TSOP and 32-

lead PLCC packages. See Figures 2 and 3 for pin assign-

ments and Table 1 for pin descriptions.

S71234-03-EOL

5/06

The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.

Intel is a registered trademark of Intel Corporation.

These specifications are subject to change without notice.

3 Mbit LPC Flash

SST49LF030A

EOL Product Data Sheet

TABLE OF CONTENTS

PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

LIST OF FIGURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

LIST OF TABLES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

FUNCTIONAL BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

PIN ASSIGNMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

DEVICE MEMORY MAPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

DESIGN CONSIDERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

PRODUCT IDENTIFICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

MODE SELECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

LPC MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Device Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

CE# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

LFRAME# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

TBL#, WP# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

INIT#, RST# . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

System Memory Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Response To Invalid Fields. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Abort Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Write Operation Status Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Multiple Device Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

General Purpose Inputs Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

JEDEC ID Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

PARALLEL PROGRAMMING MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Device Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Byte-Program Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Sector-Erase Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Block-Erase Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Chip-Erase Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Write Operation Status Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Data Protection (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

SOFTWARE COMMAND SEQUENCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

S71234-03-EOL

5/06

3 Mbit LPC Flash

SST49LF030A

EOL Product Data Sheet

LIST OF FIGURES

FIGURE 1: Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

FIGURE 2: Pin Assignments for 32-lead PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

FIGURE 3: Pin Assignments for 32-lead TSOP (8mm x 14mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

FIGURE 4: Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

FIGURE 5: LPC Read Cycle Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

FIGURE 6: LPC Write Cycle Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

FIGURE 7: Program Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

FIGURE 8: Data# Polling Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

FIGURE 9: Toggle Bit Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

FIGURE 10: Sector-Erase Command Sequence (LPC Mode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

FIGURE 11: Block-Erase Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

FIGURE 12: Register Readout Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

FIGURE 13: LCLK Waveform (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

FIGURE 14: Reset Timing Diagram (LPC Mode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

FIGURE 15: Output Timing Parameters (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

FIGURE 16: Input Timing Parameters (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

FIGURE 17: Reset Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

FIGURE 18: Read Cycle Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

FIGURE 19: Write Cycle Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

FIGURE 20: Data# Polling Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

FIGURE 21: Toggle Bit Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

FIGURE 22: Byte-Program Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

FIGURE 23: Sector-Erase Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

FIGURE 24: Block-Erase Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

FIGURE 25: Chip-Erase Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

FIGURE 26: Software ID Entry and Read (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

FIGURE 27: Software ID Exit (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

FIGURE 28: AC Input/Output Reference Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

FIGURE 29: A Test Load Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

FIGURE 30: Read Flowchart (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

FIGURE 31: Byte-Program Flowchart (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

FIGURE 32: Erase Command Sequences Flowchart (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

FIGURE 33: Software Product ID Command Sequences Flowchart (LPC Mode) . . . . . . . . . . . . . . . . . . . . 42

FIGURE 34: Byte-Program Command Sequences Flowchart (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . 43

FIGURE 35: Wait Options Flowchart (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

FIGURE 36: Software Product ID Command Sequences Flowchart (PP Mode) . . . . . . . . . . . . . . . . . . . . . 45

FIGURE 37: Erase Command Sequence Flowchart (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

FIGURE 38: 32-lead Plastic Lead Chip Carrier (PLCC) SST Package Code: NH . . . . . . . . . . . . . . . . . . . . 48

FIGURE 39: 32-lead Thin Small Outline Package (TSOP) 8mm x 14mm SST Package Code: WH . . . . . . 49

S71234-03-EOL

5/06

3 Mbit LPC Flash

SST49LF030A

EOL Product Data Sheet

LIST OF TABLES

TABLE 1: Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

TABLE 2: Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

TABLE 3: Address bits definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

TABLE 4: Address Decoding Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

TABLE 5: LPC Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

TABLE 6: LPC Write Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

TABLE 7: Multiple Device Selection Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

TABLE 8: General Purpose Inputs Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

TABLE 9: Memory Map Register Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

TABLE 10: Operation Modes Selection (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

TABLE 11: Software Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

TABLE 12: DC Operating Characteristics (All Interfaces) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

TABLE 13: Recommended System Power-up Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

TABLE 14: Pin Capacitance (VDD=3.3V, TA=25 °C, f=1 Mhz, other pins open). . . . . . . . . . . . . . . . . . . . 28

TABLE 15: Reliability Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

TABLE 16: Clock Timing Parameters (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

TABLE 17: Reset Timing Parameters, V

=3.0-3.6V (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

TABLE 18: Read/Write Cycle Timing Parameters, V

=3.0-3.6V (LPC Mode) . . . . . . . . . . . . . . . . . . . . . 31

TABLE 19: AC Input/Output Specifications (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

TABLE 20: Interface Measurement Condition Parameters (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . 32

TABLE 21: Read Cycle Timing Parameters, V

=3.0-3.6V (PP Mode). . . . . . . . . . . . . . . . . . . . . . . . . . . 33

TABLE 22: Program/Erase Cycle Timing Parameters, V

=3.0-3.6V (PP Mode) . . . . . . . . . . . . . . . . . . . 33

TABLE 23: Reset Timing Parameters, V

=3.0-3.6V (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

TABLE 24: Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

S71234-03-EOL

5/06

SST49LF030A-33-4C-WHE相似产品对比

	SST49LF030A-33-4C-WHE	SST49LF030A	SST49LF030A-33-4C-NH	SST49LF030A-33-4C-NHE	SST49LF030A-33-4C-WH
描述	3 Mbit LPC Flash	3 Mbit LPC Flash	3 Mbit LPC Flash	3 Mbit LPC Flash	3 Mbit LPC Flash

SST49LF030A-33-4C-WHE

SST49LF030A-33-4C-WHE概述

文档预览

SST49LF030A-33-4C-WHE相似产品对比

推荐资源