SSD55N03
Elektronische Bauelemente
55A, 25V,R
DS(ON)
6m
Ω
N-Channel Enhancement Mode Power Mos.FET
RoHS Compliant Product
Description
TO-252
The SSD55N03 provide the designer with the best combination
of fast switching, ruggedized device design, low on-resistance
and cost-effectiveness.
The TO-252 is universally preferred for all commercial-industrial
surface mount applications and
suited for low voltage applications
such as DC/DC converters.
Features
*
Repetitive Avalanche Rated
* Dynamic dv/dt Rating
*
Simple Drive Requirement
*
Fast Switching
D
REF.
A
B
C
D
E
F
S
G
S
Millimeter
Min.
Max.
6.40
6.80
5.20
5.50
6.80
7.20
2.20
2.80
2.30 REF.
0.70
0.90
0.60
0.90
REF.
G
H
J
K
L
M
R
Millimeter
Min.
Max.
0.50
0.70
2.20
2.40
0.45
0.55
0
0.15
0.90
1.50
5.40
5.80
0.80
1.20
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current,V
GS
@10V
Continuous Drain Current,V
GS
@10V
Pulsed Drain Current
1
Symbol
V
DS
V
GS
I
D
@T
C
=25
C
I
D
@T
C
=100
C
I
DM
P
D
@T
C
=25
C
o
o
o
Ratings
25
± 20
55
35
215
62.5
0.5
Unit
V
V
A
A
A
W
W/ C
o
Total Power Dissipation
Linear Derating Factor
Single Pulse Avalanche Energy
Avalanche Current
Operating Junction and Storage Temperature Range
2
E
AS
I
AR
Tj, Tstg
240
31
-55~+150
mJ
A
o
C
Thermal Data
Parameter
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Symbol
Max.
Max.
Rthj-c
Rthj-a
Ratings
2.0
110
Unit
o
o
C /W
C /W
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 1 of 4
SSD55N03
Elektronische Bauelemente
55A, 25V,R
DS(ON)
6m
Ω
N-Channel Enhancement Mode Power Mos.FET
Electrical Characteristics( Tj=25 C Unless otherwise specified)
Parameter
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Gate Threshold Voltage
Gate-Source Leakage Current
Drain-Source Leakage Current (Tj=25
C
)
Drain-Source Leakage Current(Tj=150
C
)
Static Drain-Source On-Resistance
3
o
o
o
Symbol
BV
DSS
BV
DS
/ Tj
V
GS(th)
I
GSS
I
DSS
Min.
25
_
Typ.
_
Max.
_
Unit
V
V/ C
V
nA
uA
uA
o
Test Condition
V
GS
=0V, I
D
=250uA
Reference to 25 C, I
D
=1mA
V
DS
=V
GS,
I
D
=250uA
V
GS
=
±
20V
V
DS
=25V,V
GS
=0
V
DS
=20V,V
GS
=0
V
GS
=10V, I
D
=30A
V
GS
=4.5V, I
D
=30A
o
0.037
_
_
_
_
_
1.0
_
_
_
_
3.0
±
100
1
25
6
9
_
_
_
R
D S (O N )
Qg
Qgs
Qgd
Td
(ON)
Tr
Td
(Off)
Tf
Ciss
Coss
Crss
Gfs
4.5
7
16.8
6
4.9
15.1
4
45.2
7.6
2326
331
174
30
_
_
_
_
_
_
_
_
_
_
_
m
Ω
Total Gate Charge
3
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time
3
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Forward Transconductance
nC
I
D
=28A
V
DS
=20V
V
GS
=5V
_
_
_
_
V
DD
=15V
I
D
=28A
nS
V
GS
=10V
R
G
=3.3
Ω
R
D
=0.53
Ω
_
_
_
pF
V
GS
=0V
V
DS
=25V
f=1.0MHz
_
_
S
V
DS
=10V, I
D
=28A
Source-Drain Diode
Parameter
Forward On Voltage
3
Continuous Source Current(Body Diode)
Symbol
V
SD
I
S
Min.
_
_
Typ.
_
_
Max.
1.5
Unit
V
A
Test Condition
I
S
=20 A, V
GS
=0V,Tj=25 C
V
D
=V
G
=0V,V
S
=1.5 V
o
55
Notes: 1.Pulse width limited by safe operating area.
2. Staring Tj=25
o
C,V
DD
=25V,L=0.1mH,R
G
=25
Ω
,I
AS
=10A
3. Pulse width
≦
300us, dutycycle
≦
2%.
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 2 of
4
SSD55N03
Elektronische Bauelemente
55A, 25V,R
DS(ON)
6m
Ω
N-Channel Enhancement Mode Power Mos.FET
Characteristics Curve
Fig 1. Typical Output Characteristics
9
Fig 2. Typical Output Characteristics
8
7
6
5
4
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
01-Jun-2002 Rev. A
http://www.SeCoSGmbH.com/
Fig 5. Forward Characteristics of
Reverse Diode
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
Any changing of specification will not be informed individual
Page
3
of
4
SSD55N03
Elektronische Bauelemente
55A, 25V,R
DS(ON)
6m
Ω
N-Channel Enhancement Mode Power Mos.FET
28
A
V
DS
= 16 V
V
DS
= 20 V
V
DS
= 24 V
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page
4
of
4
stm32/stm8
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