19-6148; Rev 0; 12/11
EVALUATION KIT AVAILABLE
MAX11120–MAX11128
1Msps, Low-Power, Serial 12-/10-/8-Bit,
4-/8-/16-Channel ADCs
General Description
The MAX11120–MAX11128 are 12-/10-/8-bit with exter-
nal reference and industry-leading 1.5MHz, full linear
bandwidth, high speed, low-power, serial output suc-
cessive-approximation register (SAR) analog-to-digital
converters (ADCs). The MAX11120–MAX11128 include
both internal and external clock modes.
These devices
feature scan mode in both internal and external clock
modes. The internal clock mode features internal averag-
ing
to increase SNR.
The external clock mode features
the SampleSetK technology, a user-programmable ana-
log input channel sequencer.
The
SampleSet
approach
provides greater sequencing flexibility for multichannel
applications while alleviating significant microcontroller
or DSP (controlling unit) communication overhead.
The internal clock mode features an integrated FIFO
allowing data to be sampled at high speeds and then held
for readout at any time or at a lower clock rate. Internal
averaging is also supported in this mode improving SNR
for noisy input signals. The devices feature analog input
channels that can be configured to be single-ended
inputs, fully differential pairs, or pseudo-differential inputs
with respect to one common input.
The
MAX11120–
MAX11128
operate from a 2.35V to 3.6V supply and con-
sume only 5.4mW at 1Msps.
The MAX11120–MAX11128 include
AutoShutdownK,
fast wake-up, and a high-speed 3-wire serial interface.
The devices feature full power-down mode for optimal
power management.
The
16MHz,
3-wire serial interface directly connects to
SPI, QSPIK, and MICROWIREK devices without external
logic.
Excellent dynamic performance, low voltage, low power,
ease of use, and small package size make these convert-
ers ideal for portable battery-powered data-acquisition
applications, and for other applications that demand low
power consumption and small space.
The MAX11120–MAX11128 are available in 28-pin, 5mm
x 5mm, TQFN packages and operate over the -40NC to
+125NC temperature range.
SampleSet and AutoShutdown are trademarks of Maxim
Integrated Products, Inc.
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor
Corporation.
Ordering Information
appears at end of data sheet.
Benefits and Features
S
Scan Modes, Internal Averaging, and Internal
Clock
S
16-Entry First-In/First-Out (FIFO)
S
SampleSet: User-Defined Channel Sequence with
Maximum Length of 256
S
Analog Multiplexer with True Differential
Track/Hold
16-/8-/4-Channel Single-Ended
8-/4-/2-Channel Fully-Differential Pairs
15-/8-/4-Channel Pseudo-Differential Relative to
a Common Input
S
Two Software-Selectable Bipolar Input Ranges
QV
REF+
/2,
QV
REF+
S
Flexible Input Configuration Across All Channels
S
High Accuracy
Q1
LSB INL,
Q1
LSB DNL, No Missing Codes
Over Temperature Range
S
70dB SINAD Guaranteed at 250kHz Input
Frequency
S
1.5V to 3.6V Wide Range I/O Supply
Allows the Serial Interface to Connect Directly
to 1.8V, 2.5V, or 3.3V Digital Systems
S
2.35V to 3.6V Supply Voltage
S
Longer Battery Life for Portable Applications
Low Power
5.4mW at 1Msps with 3V Supplies
2µA Full-Shutdown Current
S
External Differential Reference (1V to V
DD
)
S
16MHz, 3-Wire SPI-/QSPI-/MICROWIRE-/DSP-
Compatible Serial Interface
S
Wide -40NC to +125NC Operation
S
Space-Saving, 28-Pin, 5mm x 5mm TQFN
Packages
S
1Msps Conversion Rate, No Pipeline Delay
S
12-/10-/8-Bit Resolution
Applications
High-Speed Data Acquisition Systems
High-Speed Closed-Loop Systems
Industrial Control Systems
Medical Instrumentation
Battery-Powered Instruments
Portable Systems
For related parts and recommended products to use with this part,
refer to
www.maxim-ic.com/MAX11120.related.
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Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX11120–MAX11128
1Msps, Low-Power, Serial 12-/10-/8-Bit,
4-/8-/16-Channel ADCs
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND.............................................................-0.3V to +4V
OVDD, AIN0–AIN13,
CNVST/AIN14,
REF+, REF-/AIN15
to GND......................-0.3V to the lower of (V
DD
+ 0.3V) and +4V
CS,
SCLK, DIN, DOUT,
EOC
TO GND ..... -0.3V to the Lower of
(V
OVDD
+ 0.3V) and +4V
DGND to GND ......................................................-0.3V to +0.3V
Input/Output Current (all pins) ...........................................50mA
Continuous Power Dissipation (T
A
= +70NC)
TQFN (derate 34.4mW/NC above +70NC)..................2758mW
Operating Temperature Range ........................ -40NC to +125NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (B
JA
)
...........29NC/W
Junction-to-Case Thermal Resistance (B
JC
)..................2NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS (MAX11122/MAX11125/MAX11128)
(V
DD
= 2.35V to 3.6V, V
OVDD
= 1.5V to 3.6V, f
SAMPLE
= 1Msps, f
SCLK
= 16MHz, 50% duty cycle, V
REF+
= V
DD
, T
A
= -40NC to +125NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
DC ACCURACY (Notes 3 and 4)
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Offset Error Temperature
Coefficient
Gain Temperature Coefficient
Channel-to-Channel Offset
Matching
Line Rejection
Signal-to-Noise Plus Distortion
Signal-to-Noise Ratio
Total Harmonic Distortion
(Up to the 5th Harmonic)
Spurious-Free Dynamic Range
Intermodulation Distortion
PSR
SINAD
SNR
THD
SFDR
IMD
f
1
= 249.878kHz, f
2
= 219.97kHz
79
(Note 6)
70
70
DYNAMIC PERFORMANCE (250kHz, input sine wave) (Notes 3 and 7)
72.5
72.6
-87
88
-85
-78
dB
dB
dB
dB
dB
OE
TC
GE
TC
(Note 5)
RES
INL
DNL
No missing codes
0.7
-0.5
±2
±0.8
±0.5
±0.4
±1.5
12 bit
12
±1.0
±1.0
±2.5
±4.0
Bits
LSB
LSB
LSB
LSB
ppm/NC
ppm/NC
LSB
LSB/V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
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Maxim Integrated Products
2
MAX11120–MAX11128
1Msps, Low-Power, Serial 12-/10-/8-Bit,
4-/8-/16-Channel ADCs
ELECTRICAL CHARACTERISTICS (MAX11122/MAX11125/MAX11128) (continued)
(V
DD
= 2.35V to 3.6V, V
OVDD
= 1.5V to 3.6V, f
SAMPLE
= 1Msps, f
SCLK
= 16MHz, 50% duty cycle, V
REF+
= V
DD
, T
A
= -40NC to +125NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
Full-Power Bandwidth
Full-Linear Bandwidth
SYMBOL
-3dB
-0.1dB
SINAD > 70dB
-0.5dB below full scale of
249.878kHz sine wave input to the
channel being sampled, apply full-
scale 219.97kHz sine wave signal to
all 15 nonselected input channels
t
PU
t
ACQ
Internally clocked (Note 8)
Conversion Time
External Clock Frequency
Aperture Delay
Aperture Jitter
ANALOG INPUT
Unipolar (single-ended and pseudo
differential)
Input Voltage Range
V
INA
Bipolar
(Note 9)
RANGE bit set to 0
RANGE bit set to 1
0
-V
REF+
/2
-V
REF+
-0.1
-0.1
15
pF
7.5
V
REF+
V
REF+
/2
V
REF+
V
REF+
+ 0.1
±1.5
V
FA
V
RMS
t
CONV
f
SCLK
Externally clocked, f
SCLK
= 16MHz,
16 cycles (Note 8)
1000
0.16
8
30
16
Conversion cycle, external clock
156
5.9
CONDITIONS
MIN
TYP
50
7.5
1.5
MAX
UNITS
MHz
MHz
Crosstalk
-88
dB
CONVERSION RATE
Power-Up Time
Acquisition Time
2
Cycles
ns
µs
ns
MHz
ns
ps
Absolute Input Voltage Range
Static Input Leakage Current
I
ILA
C
AIN
AIN+, AIN- relative to GND
V
AIN_
= V
DD
, GND
During acquisition time,
RANGE bit = 0 (Note 10)
During acquisition time,
RANGE bit = 1 (Note 10)
Input Capacitance
EXTERNAL REFERENCE INPUT
REF- Input Voltage Range
REF+ Input Voltage Range
REF+ Input Current
V
REF-
V
REF+
I
REF+
V
REF+
= 2.5V, f
SAMPLE
= 1Msps
V
REF+
= 2.5V, f
SAMPLE
= 0
-0.3
1
36.7
0.1
+1
V
DD
+ 50mV
V
V
FA
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Maxim Integrated Products
3
MAX11120–MAX11128
1Msps, Low-Power, Serial 12-/10-/8-Bit,
4-/8-/16-Channel ADCs
ELECTRICAL CHARACTERISTICS (MAX11122/MAX11125/MAX11128) (continued)
(V
DD
= 2.35V to 3.6V, V
OVDD
= 1.5V to 3.6V, f
SAMPLE
= 1Msps, f
SCLK
= 16MHz, 50% duty cycle, V
REF+
= V
DD
, T
A
= -40NC to +125NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
V
OVDD
O
0.25
V
OVDD
O
0.75
V
OVDD
O
0.15
V
AIN_
= 0V or V
DD
±0.09
3
V
OVDD
O
0.15
V
OVDD
O
0.85
-0.3
4
2.35
1.5
f
SAMPLE
= 1Msps
Positive Supply Current
I
DD
f
SAMPLE
= 0 (1Msps devices)
Full shutdown
Normal mode
(external
reference)
Power Dissipation
AutoStandby
V
DD
= 3V,
f
SAMPLE
= 1Msps
V
DD
= 2.35V,
f
SAMPLE
= 1Msps
V
DD
= 3V,
f
SAMPLE
= 1Msps
V
DD
= 2.35V,
f
SAMPLE
= 1Msps
V
DD
= 3V
V
DD
= 2.35V
3.0
3.0
1.8
1
0.0015
5.4
3.8
mW
2.6
1.6
4.5
2.1
FW
0.006
3.6
3.6
2.5
mA
±1.5
±1.0
UNITS
DIGITAL INPUTS (SCLK, DIN,
CS, CNVST)
Input Voltage Low
Input Voltage High
Input Hysteresis
Input Leakage Current
Input Capacitance
DIGITAL OUTPUTS (DOUT,
EOC)
Output Voltage Low
Output Voltage High
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
Positive Supply Voltage
Digital I/O Supply Voltage
V
DD
V
OVDD
V
V
V
OL
V
OH
I
L
C
OUT
I
SINK
= 200FA
I
SOURCE
= 200FA
CS
= V
DD
CS
= V
DD
V
V
FA
pF
V
IL
V
IH
V
HYST
I
IN
C
IN
V
V
mV
FA
pF
Full/
AutoShutdown
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Maxim Integrated Products
4
MAX11120–MAX11128
1Msps, Low-Power, Serial 12-/10-/8-Bit,
4-/8-/16-Channel ADCs
ELECTRICAL CHARACTERISTICS (MAX11122/MAX11125/MAX11128) (continued)
(V
DD
= 2.35V to 3.6V, V
OVDD
= 1.5V to 3.6V, f
SAMPLE
= 1Msps, f
SCLK
= 16MHz, 50% duty cycle, V
REF+
= V
DD
, T
A
= -40NC to +125NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
SCLK Clock Period
SCLK Duty Cycle
SCLK Fall to DOUT Transition
16th SCLK Fall to DOUT Disable
14th SCLK Fall to DOUT Disable
SCLK Fall to DOUT Enable
DIN to SCLK Rise Setup
SCLK Rise to DIN Hold
CS
Fall to SCLK Fall Setup
SCLK Fall to
CS
Fall Hold
CNVST
Pulse Width
CS
or
CNVST
Rise to
EOC
Low
(Note 7)
CS
Pulse Width
t
DOE
t
DS
t
DH
t
CSS
t
CSH
t
CSW
t
CNV_INT
t
CSBW
See Figure 6
See Figure 7, f
SAMPLE
= 1Msps
5
SYMBOL
t
CP
t
CH
t
DOT
t
DOD
C
LOAD
=
10pF
V
OVDD
= 1.5V to 2.35V
V
OVDD
= 2.35V to 3.6V
CONDITIONS
Externally clocked conversion
MIN
62.4
40
4
4
60
16.5
15
15
16
14
4
1
4
1
5
5.3
6.2
TYP
MAX
UNITS
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
Fs
ns
TIMING CHARACTERISTICS (Figure 1) (Note 11)
C
LOAD
= 10pF, channel ID on
C
LOAD
= 10pF, channel ID off
C
LOAD
= 10pF
ELECTRICAL CHARACTERISTICS (MAX11121/MAX11124/MAX11127)
(V
DD
= 2.35V to 3.6V, V
OVDD
= 1.5V to 3.6V, f
SAMPLE
= 1Msps, f
SCLK
= 16MHz, 50% duty cycle, V
REF+
= V
DD
, T
A
= -40NC to +125NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
DC ACCURACY (Notes 3 and 4)
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Offset Error Temperature
Coefficient
Gain Temperature Coefficient
Channel-to-Channel Offset
Matching
Line Rejection
PSR
(Note 6)
OE
TC
GE
TC
(Note 5)
RES
INL
DNL
No missing codes
0.5
-0.2
±2
±0.8
±0.5
±0.1
±0.3
10 bit
10
±0.4
±0.4
±1.0
±1.0
Bits
LSB
LSB
LSB
LSB
ppm/NC
ppm/NC
LSB
LSB/V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
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Maxim Integrated Products
5
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