MIC5167
1MHz, 6A, Integrated Switch,
High-Efficiency, Synchronous Buck
DDR Memory Terminator
General Description
The MIC5167 is a high-efficiency, 6A, integrated switch,
synchronous regulator designed for use as a double data
rate (DDR) or quad data rate (QDR) terminator. The
MIC5167 is optimized for highest efficiency, achieving
more than 94% efficiency while still switching at 1MHz
over a broad range. The device works with a small 0.4µH
inductor and 300µF output capacitor. The MIC5167 offers
a simple, low-cost, JEDEC-compliant solution for
terminating high-speed, low-voltage, digital buses (i.e.
DDR, DDR2, DDR3, DDR3L, DDR3UL, DDR4, SCSI, GTL,
SSTL, HSTL, LV-TTL, LV-PECL, and LV_ECL) with a
Power-Good (PG) output.
The output voltage is controlled externally by input to the
VDDQ pin. The output voltage is one-half the voltage
applied to the VDDQ pin. The output voltage can be
adjusted down to 0.6V to address low-voltage power
needs. The MIC5167 will source 6A and sink up to 6A.
A window comparator monitors the output voltage and
controls the PG output. If the output voltage is outside
±15% limit of VREF the PG is driven low.
®
The MIC5167 is available in a 24-pin 4mm x 4mm MLF
with a junction operating range from –40°C to +125°C.
Data sheets and support documentation can be found on
Micrel’s web site at:
www.micrel.com.
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Input voltage range: 2.6V to 5.5V
V
TT
voltage adjustable down to 0.35V
Output load current up to ±6A
Power-Good (PG) fault flag
Efficiency > 94% across a broad load range
Ultra-fast transient response
Easy RC compensation
100% maximum duty cycle
Fully-integrated MOSFET switches
Micropower shutdown
Thermal-shutdown and current-limit protection
24-pin 4mm x 4mm MLF
®
–40°C to +125°C junction temperature range
Applications
•
Double data rate (DDR) or quad data rate (QDR)
memory terminator
•
High power density point-of-load conversion
•
Servers and routers
•
DVD recorders / Blu-ray players
•
Computing peripherals
•
Base stations
•
FPGAs, DSP, and low-voltage ASIC power
____________________________________________________________________________________________________________
Typical Application
MIC5167 ±6A Synchronous Buck DDR Terminator
Ramp Control is a trademark of Micrel, Inc.
MLF and
MicroLeadFrame
are registered trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
January 2012
M9999-012312-B
Micrel, Inc.
MIC5167
Ordering Information
Part Number
MIC5167YML
Voltage
Adjustable
Junction Temperature Range
–40°C to +125°C
Package
24-Pin 4x4 MLF
®
Lead Finish
Pb-Free
Note:
®
MLF is a GREEN RoHS-compliant package. Lead finish is NiPdAu. Mold compound is Halogen Free.
Pin Configuration
24-Pin 4mm x 4mm MLF
®
(ML)
Pin Description
Pin Number
1, 6, 13, 18
Pin Name
PVIN
Description
Power Supply Voltage (Input): The PVIN pins are the input supply to the internal P-Channel
Power MOSFET. A 22µF ceramic is recommended for bypassing at each PVIN pin. The SVIN
pin must be connected to the PVIN pin.
Enable/Delay (Input): This pin is internally fed with a 1µA current source from SVIN. A delayed
turn on is implemented by adding a capacitor to this pin. The delay is proportional to the capacitor
value. The internal circuits are held off until EN/DLY reaches the enable threshold of 1.24V. This
pin is pulled low when the input voltage is lower than the UVLO threshold.
VDDQ (Input): VDDQ is connected to an internal precession divider which provides the reference
voltage (VREF).
VTT Reference (Output): This output provides an output of the internal reference voltage
VDDQ/2. Connect a 100pF capacitor to ground at this pin.
PG (Output): This is an open drain output that indicates when the output voltage is within ±15%
of its nominal voltage. The PG flag is asserted without delay when the enable is set low or when
the output goes outside ±15% the window threshold.
Feedback (Input): Input to the error amplifier.
Compensation pin (Input): The MIC5167 uses an internal compensation network containing a
fixed-frequency zero (phase lead response) and pole (phase lag response) which allows the
external compensation network to be much simplified for stability. The addition of a single
capacitor and resistor to the COMP pin will add the necessary pole and zero for voltage mode
loop stability using low value, low-ESR ceramic capacitors.
Signal Ground: Internal signal ground for all low power circuits.
2
EN/DLY
3
4
5
14
VDDQ
VREF
PG
FB
15
COMP
16
SGND
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Micrel, Inc.
MIC5167
Pin Description (Continued)
Pin Number
17
7, 12, 19, 24
8, 9, 10, 11,
20, 21, 22, 23
EP
Pin Name
SVIN
PGND
SW
GND
Description
Signal Power Supply Voltage (Input): This pin is connected externally to the PVIN pin. A 22µF
ceramic capacitor from the SVIN pin to SGND must be placed next to the IC.
Power Ground: Internal ground connection to the source of the internal N-Channel MOSFETs.
Switch (Output): This is the connection to the drain of the internal P-Channel MOSFET and drain
of the N-Channel MOSFET. This is a high-frequency, high-power connection; therefore traces
should be kept as short and as wide as practical.
Exposed Pad (Power): Must be connected to a GND plane for full output power to be realized.
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Micrel, Inc.
MIC5167
Absolute Maximum Ratings
(1,2)
PV
IN
to PGND.................................................... –0.3V to 6V
SV
IN
to PGND..................................................–0.3V to PV
IN
V
DDQ
to PGND .................................................–0.3V to PV
IN
V
SW
to PGND...................................................–0.3V to PV
IN
V
EN/DLY
to PGND ..............................................–0.3V to PV
IN
V
PG
to PGND ...................................................–0.3V to PV
IN
PGND to SGND ............................................. –0.3V to 0.3V
Junction Temperature ................................................ 150°C
Storage Temperature Range ....................–65°C to +150°C
Lead Temperature (soldering, 10s)............................ 260°C
Operating Ratings
(3)
Supply Voltage (PV
IN
,SV
IN
) .............................. 2.6V to 5.5V
Supply Voltage (V
DDQ
) .......................................0.7V to PV
IN
Power-Good (PG) Voltage (V
PG
)..........................0V to PV
IN
Enable Input (V
EN/DLY
)...........................................0V to PV
IN
Junction Temperature (T
J
) ..................–40°C
≤
T
J
≤
+125°C
Package Thermal Resistance
4mm x 4mm MLF
®
-24 (θ
JC
)................................14°C/W
4mm x 4mm MLF
®
-24 (θ
JA
)................................40°C/W
Electrical Characteristics
(4)
SV
IN
= PV
IN
= V
EN/DLY
= 3.3V, V
FB
= V
TT
= 0.6V, T
A
= 25°C, unless noted.
Bold
values indicate –40°C< T
J
< +125°C.
Parameter
Power Input Supply
Input Voltage Range (PV
IN
)
Undervoltage Lockout (UVLO) Trip
Level
UVLO Hysteresis
Quiescent Supply Current
Shutdown Current
V
TT
Output
V
TT
Output Voltage
Load Regulation
Line Regulation
FB Pin Bias Current
Enable Control
EN/DLY Threshold Voltage
EN Hysteresis
EN/DLY Source Current
Oscillator
Switching Frequency
Maximum Duty Cycle
Short-Current Protection
Sourcing Current Limit
Internal FETs
Top-MOSFET R
DS(ON)
Bottom-MOSFET R
DS(ON)
SW Leakage Current
V
IN
Leakage Current
2.6
PV
IN
Rising
V
FB
= 0.9V (not switching)
V
EN/DLY
= 0V
V
DDQ
=1.2V
V
FB
=0.6V, I
OUT
= -6A to +6A
V
FB
= 0.6V; V
IN
= 2.6 to 5.5V, I
LOAD
= 100mA
V
FB
= 0.6V
1.14
V
EN/DLY
= 0.5V; V
IN
= 2.9V and V
IN
= 5.5V
I
OUT
= 0A
V
FB
≤
0.5V
V
FB
= 0.5V
V
FB
= 0.5V, I
SW
= 1A
V
FB
= 0.9V, I
SW
= -1A
PV
IN
= 5.5V, V
SW
= 5.5V, V
EN
= 0V
PV
IN
= 5.5V, V
SW
= 0V, V
EN
= 0V
0.7
0.8
100
6.5
0.588
2.4
2.5
280
0.85
5
0.6
0.4
0.2
10
1.24
20
1.0
1.0
1.34
1.3
1.2
5.5
2.6
V
V
mV
mA
µA
V
%
%
nA
V
mV
µA
MHz
%
A
mΩ
mΩ
60
25
µA
Condition
Min.
Typ.
Max.
Units
1.3
10
0.612
9
30
25
14
January 2012
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Micrel, Inc.
MIC5167
Electrical Characteristics
(4)
(Continued)
SV
IN
= PV
IN
= V
EN/DLY
= 3.3V, V
FB
= V
TT
= 0.6V, T
A
= 25°C, unless noted.
Bold
values indicate –40°C< T
J
< +125°C.
Parameter
Power-Good (PG)
PG Window
Hysteresis
PG Output Low Voltage
PG Leakage Current
Thermal Protection
Over-Temperature Shutdown
Over-Temperature Shutdown
Hysteresis
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. Devices are ESD sensitive. Handling precautions recommended.
3. The device is not guaranteed to function outside its operating rating.
4. Specification for packaged product only.
Condition
Threshold % of V
TT
from V
REF
I
PG
= 5mA (sinking), V
FB
= 0.4V; V
EN
= V
IN
V
PG
= 5.5V; V
FB
= 0.625V
Min.
±10
Typ.
±15
2.5
130
Max.
±20
Units
%
%
mV
1.0
2.0
160
20
μA
T
J
Rising
°C
°C
January 2012
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