®
TS914
RAIL TO RAIL
CMOS QUAD OPERATIONAL AMPLIFIER
.
.
.
.
.
.
.
RAIL TO RAIL
INPUT AND OUTPUT
VOLTAGE RANGES
SINGLE (OR DUAL) SUPPLY OPERATION
FROM
2.7V TO 16V
EXTREMELY LOW INPUT BIAS CURRENT :
1pA
TYP
LOW INPUT OFFSET VOLTAGE : 5mV max.
SPECIFIED FOR
600Ω
AND
100Ω
LOADS
LOW SUPPLY CURRENT : 200µA/Ampli
SPICE MACROMODEL
INCLUDED IN THIS
SPECIFICATION
N
DIP14
(Plastic Package)
D
SO14
(Plastic Micropackage)
ORDER CODES
Part Number
TS914I/AI
Temperature Range
-40, +125 C
o
Package
N
•
D
•
PIN CONNECTIONS
(top view)
DESCRIPTION
The TS914 is a RAIL TO RAIL quad CMOS opera-
tional amplifier designed to operate with a single or
dual supply voltage.
The input voltage range V
icm
includes the two
supply rails V
CC+
and V
CC-
.
The output reaches :
•
V
CC-
+50mV
V
CC+
-50mV
with R
L
= 10kΩ
-
+
•
V
CC
+350mV V
CC
-350mV with R
L
= 600Ω
This product offers a broad supply voltage operat-
ing range from 2.7V to 16V and a supply current of
only 200µA/amp. (V
CC
= 3V).
Source and sink output current capability is typi-
cally 40mA (at V
CC
= 3V), fixed by an internal
limitation circuit.
STMicroelectronics is offering a dual op-amp with
the same features : TS912.
April 1999
Output 1
Inverting Input 1
Non-inve rtin g Input 1
V
CC
+
Non-inve rting Input 2
Invert ing Input 2
Output 2
1
2
3
4
5
6
7
+
-
+
-
-
+
-
+
14
13
12
11
10
9
8
Output 4
Invertin g Input 4
Non-inve rtin g Input 4
V
CC
-
Non-inve rtin g Input 3
Invertin g Input 3
Output 3
1/13
TS914
SCHEMATIC DIAGRAM
(1/4 TS914)
V
CC
Non-inverting
Input
Inte rnal
Vre f
Inverting
Input
O utput
V
CC
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
id
V
i
I
in
I
o
T
oper
T
stg
Notes :
Parameter
Supply Voltage - (note 1)
Differential Input Voltage - (note 2)
Input Voltage - (note 3)
Current on Inputs
Current on Outputs
Operating Free Air Temperature RangeI
Storage Temperature
Value
18
±18
-0.3 to 18
±50
±130
-40 to +125
-65 to +150
Unit
V
V
V
mA
mA
o
o
C
C
1. All voltage values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of input and output voltages must never exceed V
CC+
+0.3V.
OPERATING CONDITIONS
Symbol
V
CC
V
icm
Supply Voltage
Common Mode Input Voltage Range
-
Parameter
Value
2.7 to 16
V
CC
-0.2 to
+
V
CC
+0.2
Unit
V
V
2/13
TS914
ELECTRICAL CHARACTERISTICS
V
CC+
= 3V, V
CC-
= 0V, R
L
,C
L
connected to V
CC
/2, T
amb
= 25
o
C (unless otherwise specified)
Symbol
V
io
Parameter
Input Offset Voltage (V
ic
= V
o
= V
CC
/2)
T
min.
≤
T
amb
≤
T
max.
DV
io
I
io
I
ib
I
CC
CMR
SVR
A
vd
V
OH
TS914
TS914A
TS914
TS914A
TS914I/AI
Min.
Typ.
Max.
10
5
12
7
5
1
100
200
1
150
300
200
300
400
70
70
10
Unit
mV
Input Offset Voltage Drift
Input Offset Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Input Bias Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Supply Current (per amplifier, A
VCL
= 1, no load)
T
min.
≤
T
amb
≤
T
max.
Common Mode Rejection Ratio
V
ic
= 0 to 3V, V
o
= 1.5V
Supply Voltage Rejection Ratio (V
CC+
= 2.7 to 3.3V, V
O
= V
CC
/2)
Large Signal Voltage Gain (R
L
= 10kΩ, V
O
= 1.2V to 1.8V)
T
min.
≤
T
amb
≤
T
max.
High Level Output Voltage (V
id
= 1V)
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
T
min.
≤
T
amb
≤
T
max.
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
T
min.
≤
T
amb
≤
T
max.
R
L
= 10kΩ
R
L
= 600Ω
−
Source (V
o
= V
CC
)
+
Sink
(V
o
= V
CC
)
µV/
o
C
pA
pA
µA
dB
40
3
2
2.9
2.3
2.8
2.1
dB
V/mV
V
2.96
2.6
2
V
OL
Low Level Output Voltage (V
id
= -1V)
50
300
900
100
400
150
600
40
40
0.8
mV
I
o
GBP
SR
+
SR
-
∅m
e
n
V
O1
/V
O2
Output Short Circuit Current (V
id
=
±1V)
mA
MHz
V/µs
Gain Bandwidth Product
(A
VCL
= 100, R
L
= 10kΩ, C
L
= 100pF, f = 100kHz)
Positive Slew Rate
A
VCL
= 1, R
L
= 10kΩ, V
i
=1.3V to 1.7V, C
L
= 100pF
Negative Slew Rate
Phase Margin
Equivalent Input Noise Voltage (R
s
= 100Ω, f = 1kHz)
Channel Separation (f = 1kHz)
0.5
0.4
30
30
120
V/µs
Degrees
nV
Hz
√
dB
Note 1 :
Maximum values including unavoidable inaccuracies of the industrial test.
3/13
TS914
ELECTRICAL CHARACTERISTICS
V
CC+
= 5V, V
CC-
= 0V, R
L
,C
L
connected to V
CC
/2, T
amb
= 25
o
C (unless otherwise specified)
Symbol
V
io
Parameter
Input Offset Voltage (V
ic
= V
o
= V
CC
/2)
T
min.
≤
T
amb
≤
T
max.
DV
io
I
io
I
ib
I
CC
CMR
SVR
A
vd
V
OH
TS914
TS914A
TS914
TS914A
TS914I/AI
Min.
Typ.
Max.
10
5
12
7
5
1
100
200
1
150
300
230
350
450
50
50
10
7
4.90
4.25
4.8
4.1
mV
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
T
min.
≤
T
amb
≤
T
max.
I
o
GBP
SR
+
SR
-
∅m
Output Short Circuit Current (V
id
=
±1V)
R
L
= 10kΩ
R
L
= 600Ω
−
Source (V
o
= V
CC
)
+
Sink
(V
o
= V
CC
)
50
350
1400
100
500
150
750
45
45
60
60
0.9
V/µs
0.8
0.5
30
V/µs
Degrees
mA
MHz
75
80
30
Unit
mV
Input Offset Voltage Drift
Input Offset Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Input Bias Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Supply Current (per amplifier, A
VCL
= 1, no load)
T
min.
≤
T
amb
≤
T
max.
Common Mode Rejection Ratio
V
ic
= 1.5 to 3.5V, V
o
= 2.5V
Supply Voltage Rejection Ratio (V
CC+
= 3 to 5V, V
O
= V
CC
/2)
Large Signal Voltage Gain (R
L
= 10kΩ, V
O
= 1.5V to 3.5V)
T
min.
≤
T
amb
≤
T
max.
High Level Output Voltage (V
id
= 1V)
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
T
min.
≤
T
amb
≤
T
max.
R
L
= 10kΩ
R
L
= 600Ω
µV/
o
C
pA
pA
µA
dB
dB
V/mV
V
4.95
4.65
3.7
V
OL
Low Level Output Voltage (V
id
= -1V)
Gain Bandwidth Product
(A
VCL
= 100, R
L
= 10kΩ, C
L
= 100pF, f = 100kHz)
Positive Slew Rate
A
VCL
= 1, R
L
= 10kΩ, V
i
=1V to 4V, C
L
= 100pF
Negative Slew Rate
Phase Margin
Note 1 :
Maximum values including unavoidable inaccuracies of the industrial test.
4/13
TS914
ELECTRICAL CHARACTERISTICS
V
CC+
= 10V, V
CC-
= 0V, R
L
,C
L
connected to V
CC
/2, T
amb
= 25
o
C (unless otherwise specified)
Symbol
V
io
Parameter
Input Offset Voltage (V
ic
= V
o
= V
CC
/2)
T
min.
≤
T
amb
≤
T
max.
DV
io
I
io
I
ib
I
CC
CMR
SVR
A
vd
V
OH
TS914
TS914A
TS914
TS914A
TS914I/AI
Min.
Typ.
Max.
10
5
12
7
5
1
100
200
1
150
300
400
600
700
50
75
70
50
80
20
60
15
9.85
9.2
9.8
9
mV
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
T
min.
≤
T
amb
≤
T
max.
I
o
GBP
SR
+
SR
-
∅m
e
n
THD
C
in
V
O1
/V
O2
Output Short Circuit Current (V
id
=
±1V)
R
L
= 10kΩ
R
L
= 600Ω
−
Source (V
o
= V
CC
)
+
Sink
(V
o
= V
CC
)
50
650
2300
150
800
150
900
45
45
60
60
1.3
V/µs
1.3
0.8
40
30
0.024
1.5
120
V/µs
Degrees
nV
Hz
√
%
pF
dB
mA
MHz
9.95
9.35
7.8
Unit
mV
Input Offset Voltage Drift
Input Offset Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Input Bias Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Supply Current (per amplifier, A
VCL
= 1, no load)
T
min.
≤
T
amb
≤
T
max.
Common Mode Rejection Ratio
V
ic
= 3 to 7V, V
o
= 5V
V
ic
= 0 to 10V, V
o
= 5V
Supply Voltage Rejection Ratio (V
CC+
= 5 to 10V, V
O
= V
CC
/2)
Large Signal Voltage Gain (R
L
= 10kΩ, V
O
= 2.5V to 7.5V)
T
min.
≤
T
amb
≤
T
max.
High Level Output Voltage (V
id
= 1V)
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
T
min.
≤
T
amb
≤
T
max.
R
L
= 10kΩ
R
L
= 600Ω
µV/
o
C
pA
pA
µA
dB
dB
V/mV
V
V
OL
Low Level Output Voltage (V
id
= -1V)
Gain Bandwidth Product
(A
VCL
= 100, R
L
= 10kΩ, C
L
= 100pF, f = 100kHz)
Positive Slew Rate
A
VCL
= 1, R
L
= 10kΩ, V
i
= 2.5V to 7.5V, C
L
= 100pF
Negative Slew Rate
Phase Margin
Equivalent Input Noise Voltage (R
s
= 100Ω, f = 1kHz)
Total Harmonic Distortion
(A
VCL
= 1, R
L
= 10kΩ, C
L
= 100pF, V
O
= 4.75V to 5.25V, f = 1kHz)
Input Capacitance
Channel Separation (f = 1kHz)
Note 1 :
Maximum values including unavoidable inaccuracies of the industrial test.
5/13
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