TSA0801
8-BIT, 40MSPS, 40mW A/D CONVERTER
s
8-bit A/D converter in deep submicron
s
s
s
s
s
s
s
s
CMOS technology
Single supply voltage: 2.5V
Input range: 2Vpp differential
40Msps sampling frequency
Ultra low power consumption: 40mW @
40MHz (10mW @ 5Msps)
ENOB=7.9 @ Nyquist
SFDR typically up to 67dB @ Fs=40Msps,
Fin=5MHz
Built-in reference voltage with external bias
capability
STMicroelectronics 8, 10, 12 and 14-bits ADC
pinout compatibility
ORDER CODE
Part Number
TSA080 1CF
TSA080 1CFT
TSA080 1IF
TSA080 1IFT
EVAL0801/AA
Temperature
Range
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
Package
TQFP48
TQFP48
TQFP48
TQFP48
Conditioning
Tray
Tape & Reel
Tray
Tape & Reel
Marking
SA0801C
SA0801C
SA0801I
SA0801I
Evaluation board
PIN CONNECTIONS
(top view)
AGND
AVCC
VCCB
GNDB
AVCC
DFSB
VCCB
OEB
NC
NC
NC
DR
index
c orner
48
47 46 45
44 43
42
41
40
39
38 37
36 NC
35 NC
34 NC
33 NC
32 NC
31 D0(L SB)
DESCRIPTION
The TSA0801 is an 8-bit, 40MHz sampling fre-
quency Analog to Digital converter using a deep
submicron CMOS technology combining high per-
formances and very low power consumption.
The TSA0801 is based on a pipeline structure and
digital error correction to provide excellent static
linearity and go beyond 7.9 effective bits at
Fs=40Msps, and Fin=10MHz.
A voltage reference is integrated in the circuit to
simplify the design and minimize external compo-
nents. It is nevertheless possible to use the circuit
with an external reference.
Differential or single-ended analog inputs can be
applied to the converter. A tri-state capability is
available on the outputs. The output data can be
coded into two different formats. A Data Ready
signal is raised as the data is valid on the output
and can be used for synchronization purposes.
The TSA0801 is available in commercial (0 to
+70°C) and extended (-40 to +85°C) temperature
range, in a small 48 pins TQFP package.
APPLICATIONS
IPOL
VREFP
VREFM
AGND
VIN
AGND
VINB
AGND
INCM
AGND
AVCC
AVCC
1
2
3
4
5
6
7
8
9
10
11
12
13
DVCC
14 15
DVCC
DGND
16
CLK
17
DGND
18 19 20 21 22
DGND
NC
GNDB
GNDB
VCCB
23 24
D7 (MSB)
OR
TSA0801
30 D1
29 D2
28 D3
27 D4
26 D5
25 D6
PACKAGE
7
×
7 mm TQFP48
s
s
s
s
Hand-held instrumentation
Camcorders
Computer scanners
Digital communication
October 2000
1/20
TSA0801
ABSOLUTE MAXIMUM RATINGS
Symbol
AVCC
DVCC
VCCB
IDout
Tstg
ESD
Analog Supply voltage
1)
Digital Supply voltage
1)
Digital buffer Supply voltage
1)
Digital output current
Storage temperature
Electrical Static Discharge:
- HBM
- CDM-JEDEC Standard
Parameter
Values
0 to 3.3
0 to 3.3
0 to 3.3
-100 to 100
+150
2
1.5
Unit
V
V
V
mA
°C
KV
1) All voltages values, except differential voltage, are with respect to network ground terminal. The magnitude of input and output voltages
must never exceed -0.3V or VCC+0V
OPERATING CONDITIONS
Symbol
AVCC
DVCC
VCCB
VREFP
VREFM
Parameter
Analog Supply voltage
Digital Supply voltage
Digital buffer Supply voltage
Forced top voltage reference
Forced bottom reference voltage
Test conditions
Min
2.25
2.25
2.25
1.16
0
Typ
2.5
2.5
2.5
-
0
Max
2.7
2.7
2.7
AVCC
0.5
Unit
V
V
V
V
V
BLOCK DIAGRAM
+2.5V
VREFP
GNDA
VIN
INCM
VINB
VREFM
stage
1
stage
2
stage
n
Reference
circuit
IPOL
Sequencer-phase shifting
CLK
Timing
Digital data correction
DFSB
OEB
DR
DO
Buffers
TO
D7
OR
GND
2/20
TSA0801
PIN CONNECTIONS
(top view)
VCCB
AGND
AVCC
AVCC
GNDB
DFSB
VCCB
OEB
NC
NC
DR
NC
index
corner
48
IPOL
VREFP
VRE FM
AGND
VIN
AGND
VINB
AGN D
INCM
AGND
AVC C
AVC C
1
2
3
4
5
6
7
8
9
10
11
12
13
DVCC
47 46
45
44 43
42
41
40
39
38 37
36 NC
35 NC
34 NC
33 NC
32 NC
31 D0(LS B)
TSA0801
30 D1
29 D2
28 D3
27 D4
26 D5
25 D6
14 15
DVCC
DGND
16
CLK
17
DGND
18 19
DGND
NC
20
GNDB
21 22
GNDB
VCCB
23
OR
24
D7 (MSB)
PIN DESCRIPTION
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Name
IPOL
VREFP
VREFM
AGND
VIN
AGND
VINB
AGND
INCM
AGND
AVCC
AVCC
DVCC
DVCC
DGND
CLK
DGND
NC
DGND
GNDB
GNDB
VCCB
OR
Description
Analog bias curr ent input
Top voltage reference
Bottom vo ltage referen ce
Analog ground
Analog input
Analog ground
Inverted analog input
Analog ground
Input common mode
Analog ground
Analog power supply
Analog power supply
Digital power supply
Digital power supply
Digital ground
Clock input
Digital ground
Non connected
Digital ground
Digital buffer gro und
Digital buffer ground
Digital buffer power supply
Out Of Range output
0V
0V
0V
2.5V
CMOS outp ut(2.5V)
CMOS outp ut(2.5V)
1V
0V
0V
1Vpp
0V
1Vpp
0V
0.5V
0V
2.5V
2.5V
2.5V
2.5V
0V
2.5V compati ble CMOS input
0V
Observation
Pin No
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Name
D6
D5
D4
D3
D2
D1
D0(LSB)
NC
NC
NC
NC
NC
NC
DR
VCCB
GNDB
VCCB
NC
NC
OEB
DFSB
AVCC
AVCC
AGND
Descri ption
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Non conne cted
Non conne cted
Non conne cted
Non conne cted
Non conne cted
Non conne cted
Data Ready output
Digital Buffer power supply
Digital Buffer ground
Digital Buffer power supply
Non conne cted
Non conne cted
Output Enable input
Data Format Select input
Analog power supply
Analog power supply
Analog ground
2.5V compatib le CMOS input
2.5V compatib le CMOS input
2.5V
2.5V
0V
CMOS output (2.5V)
2.5V
0V
2.5V
Observ ation
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
D7(MSB) Most Significa ntBit output
3/20
TSA0801
ELECTRICAL CHARACTERISTICS
AVCC = DVCC = VCCB = 2.5V, Fs= 40Msps,Fin=1MHz, Vin@ -1.0dBFS, VREFM = 0V
Tamb = 25°C (unless otherwise specified)
TIMING CHARACTERISTICS
Symbol
FS
DC
TC1
TC2
Tod
Tpd
Ton
Toff
Parameter
Sampling Frequency
Clock Duty Cycle
Clock pulse width (high)
Clock pulse width (low)
Data Output Delay (Fall of Clock 10pF load capacitance
to Data Valid)
Data Pipeline delay
Falling edge of OEB to digital
output valid data
Rising edge of OEB to digital
output tri-state
Test conditions
Min
0.5
45
11
11
50
12.5
12.5
5
6.5
1
1
Typ
Max
40
55
Unit
MHz
%
ns
ns
ns
cycles
ns
ns
TIMING DIAGRAM
N+4
N+3
N+5
N+6
N+2
N-1
N
N+1
N+7
N+8
CLK
6.5 clk cycles
OEB
Tod
DATA
OUT
N-8
N-7
N-6
N-5
Toff
N-4
N-3
N-2
Ton
N
N+1
DR
HZ state
4/20
TSA0801
CONDITIONS
AVCC = DVCC = VCCB = 2.5V, Fs= 40Msps,Fin= 1MHz, Vin@ -1.0dBFS, VREFM= 0V
Tamb = 25°C (unless otherwise specified)
ANALOG INPUTS
Symbol
Parameter
Test conditions
Min
Typ
2.0
7.0
Vin@-1dBFS, FS=40Msps
100
60
Max
Unit
Vpp
pF
MHz
MHz
VIN-VINB Full scale reference voltage
Cin
BW
ERB
Input capacitance
Analog Input Bandwitdh
Effective Resolution Bandwidth
1)
1) See parameters definition for more information
REFERENCE VOLTAGE
Symbol
VREFP
Parameter
Top internal reference voltage
Test conditions
Min
0.89
Tmin= -40°C to Tmax= 85°C
1)
0.88
1.19
Vpol
Ipol
Ipol
VINCM
Analog bias voltage
Analog bias current
Analog bias current
Input common mode voltage
Tmin= -40°C to Tmax= 85°C
1)
Normal operating mode
Shutdown mode
0.46
Tmin= -40°C to Tmax= 85°C
1)
0.46
1.18
50
70
0
0.57
0.66
0.66
1.27
Typ
1.03
Max
1.16
1.16
1.35
1.36
100
Unit
V
V
V
V
µA
µA
V
V
1) Not fully tested over the temperature range. Guaranted by sampling.
5/20
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