HCC/HCF4018B
PRESETTABLE DIVIDE-BY-N COUNTER
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MEDIUM SPEED OPERATION - 10MHz (typ.)
AT V
DD
– V
SS
= 10V
FULLY STATIC OPERATION
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
5V, 10V, AND 15V PARAMETRIC RATINGS
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N
o
13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC4018BF
HCF4018BM1
HCF4018BEY
HCF4018BC1
DESCRIPTION
The HCC4018B
(extended temperature range) and
HCF4018B
(intermediate temperature range) are
monolithic integrated circuit, available in 16-lead
dual in-line plastic or ceramic package and plastic
micropackage.
The
HCC/HCF4018B
types consist of 5 Johnson-
Counter stages, buffered Q outputs from each
stage, and counter preset control gating. CLOCK,
RESET, DATA, PRESET ENABLE, and 5 individual
JAM inputs are provided. Divide by 10, 8, 6, 4, or 2
counter configurations can be implemented by feed-
ing the Q5, Q4, Q3, Q2, Q1 signals, respectively,
back to the DATA input.
Divide-by-9, 7, 5, or 3 counter configurations can be
implemented by the use of a
HCC/HCF4011B
gate
package to properly gate the feedback connection
to the DATA input. Divide-by-functions greater than
10 can be achieved by use of multiple
HCC/HCF
4018B
units. The counter is advanced one count at
the positive clock-signal transition. Schmitt Trigger
action on the clock line permits unlimited clock rise
and fall times. A high RESET signal clears the
counter to an all-zero condition. A high PRESENT-
ENABLE signal allows information on the JAM in-
puts to preset the counter. Anti-lock gating is
provided to assure the proper counting sequence.
June 1989
PIN CONNECTIONS
1/12
HCC/HFC4018B
FUNCTIONAL DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DD
*
V
i
I
I
P
to t
Parameter
Supply Voltage :
HC C
Types
H CF
Types
Input Voltage
DC Input Current (any one input)
Total Power Dissipation (per package)
Dissipation per Output Transistor
for T
o p
= Full Package-temperature Range
Operating Temperature :
HCC
Types
H CF
Types
Storage Temperature
Value
– 0.5 to + 20
– 0.5 to + 18
– 0.5 to V
DD
+ 0.5
±
10
200
100
– 55 to + 125
– 40 to + 85
– 65 to + 150
Unit
V
V
V
mA
mW
mW
°C
°C
°C
T
op
T
stg
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sec-
tions of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device
reliability.
* All voltage values are refered to V
SS
pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
DD
V
I
T
op
Parameter
Supply Voltage :
HCC
Types
HC F
Types
Input Voltage
Operating Temperature :
HCC
Types
H CF
Types
Value
3 to 18
3 to 15
0 to V
DD
– 55 to + 125
– 40 to + 85
Unit
V
V
V
°C
°C
2/12
HCC/HCF4018B
DYNAMIC ELECTRICAL CHARACTERISTICS
(T
amb
= 25°C, C
L
= 50pF, R
L
= 200kΩ,
typical temperature coefficient for all V
DD
values is 0.3%/°C, all input rise and fall times = 20ns)
Symbol
Parameter
Test Conditions
V
D D
(V)
Min.
5
10
15
t
T HL
, t
TL H
Transition Time
5
10
15
f
CL
Maximum Clock Input Frequency
5
10
15
t
W
Clock Input Width
5
10
15
t
r
, t
f
Clock Input Rise or Fall Time
5
10
15
t
set up
Data Input Set-up Time
5
10
15
t
H
Data Input Hold-time
5
10
15
PRESET* O R RESET OPERATION
t
PL H
, t
PHL
Propagation Delay Time
(reset or reset to Q)
5
10
15
t
W
Preset or Reset Pulse Width
5
10
15
t
re m
Preset or Reset Removal Time
5
10
15
160
70
50
80
30
20
275
125
90
80
35
25
40
15
10
ns
ns
550
250
180
ns
40
12
6
140
80
60
20
6
3
70
40
30
ns
ns
Unlimited
µs
3
7
8.5
160
70
50
Value
Typ.
200
90
65
100
50
40
6
14
17
80
35
25
ns
MHz
Max.
400
180
130
200
100
80
ns
ns
Unit
t
PL H
, t
PHL
Propagation Delay Time
•
At
PRESET ENABLE OR JAM inputs
5/12