HS-139RH-T
TM
Data Sheet
July 1999
FN4646.1
Radiation Hardened Quad Voltage
Comparator
Intersil’s Satellite Applications
(SAF) devices are
fully tested and guaranteed to 100kRAD total dose. These
QML Class T devices are processed to a standard flow
intended to meet the cost and shorter lead-time needs of
large volume satellite manufacturers, while maintaining a
high level of reliability.
The Radiation Hardened HS-139RH-T consists of four
independent single or dual supply voltage comparators on a
single monolithic substrate. The common mode input
voltage range includes ground, even when operated from a
single supply, and the low supply current make these
comparators suitable for low power applications. These
types were designed to directly interface with TTL and
CMOS.
The HS-139RH-T is fabricated on our dielectrically isolated
Rad Hard Silicon Gate (RSG) process, which provides an
immunity to Single Event Latch-up and the capability of
highly reliable performance in any radiation environment.
Flow
TM
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• Radiation Environment
- Latch-up Free Under Any Conditions
- Total Dose . . . . . . . . . . . . . . . . . . . . . . 3 x 10
5
RAD(Si)
- SEU LET . . . . . . . . . . . . . . . . . . . . . . . 20MEV/cm
2
/mg
• 100V Output Voltage Withstand Capability
• Differential Input Voltage Range Equal to the Supply
Voltage
• Input Offset Voltage (V
IO
) . . . . . . . . . . . . . . . . .2mV(max)
• Quiescent Supply Current . . . . . . . . . . . . . . . . .2mA(max)
Applications
• Pulse Generators
• Timing Circuitry
• Level Shifting
• Analog to Digital Conversion
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HS-139RH-T
are contained in SMD 5962-98613. A “hot-link” is
provided on our homepage with instructions for
downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Intersil’ Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Pinouts
HS-139RH-T (SBDIP), CDIP2-T14
TOP VIEW
OUT 2 1
OUT 1 2
V+ 3
- IN 1 4
+ IN 1 5
- IN 2 6
+ IN 2 7
14 OUT 3
13 OUT 4
12 GND
11 + IN 4
10 - IN 4
9 + IN 3
8 - IN 3
Ordering Information
ORDERING NUMBER
5962R9861301TCC
5962R9861301TXC
PART NUMBER
HS1-139RH-T
HS9-139RH-T
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
OUT 2
OUT 1
V+
- IN 1
+ IN 1
- IN 2
- IN 2
HS-139RH-T (FLATPACK), CDFP3-F14
TOP VIEW
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUT 3
OUT 4
GND
+ IN 4
- IN 4
+ IN 3
- IN 3
NOTE: Minimum order quantity for -T is 150 units
through distribution, or 450 units direct.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.
HS-139RH-T
Die Characteristics
DIE DIMENSIONS:
3750µm x 2820µm (148 mils x 111 mils)
483µm
±
25.4µm (19 mils
±
1 mil)
INTERFACE MATERIALS
Glassivation
Type: Nitride (Si3N4) over Silox (SiO2
Nitride Thickness: 4.0kA +/- 0.5kA
Silox Thickness: 12.0kA +/- 1.3kA
Top Metallization
Type: AL Si Cu
Thickness: 16.0kA +/- 2kA
Substrate:
Radiation Hardened Silicon Gate,
Dielectric Isolation
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION
Substrate Potential:
Unbiased (DI)
ADDITIONAL INFORMATION
Worst Case Current Density:
<2.0 x 10
5
A/cm
2
Transistor Count:
49
Metallization Mask Layout
HS-139RH-T
GND
(12)
+IN4
(11)
-IN4
(10)
OUT4
(13)
+IN3
(9)
OUT3
(14)
-IN3
(8)
+IN2
(7)
OUT2
(1)
-IN2
(6)
OUT1
(2)
V+
(3)
-IN1
(4)
+IN1
(5)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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