19-4206; Rev 0; 8/08
KIT
ATION
EVALU N KITE
A IL BL
A TIO A
EVALU VABLE
AVAILA
USB 2.0 Hi-Speed 2-of-4 Crosspoint Switch
General Description
The MAX4989 is a bidirectional 2-of-4 USB 2.0 cross-
point switch. The MAX4989 features the low on-capaci-
tance and low on-resistance necessary to switch USB
2.0 low-/full-/Hi-Speed signals at data rates up to
480Mbps. This device allows any 2-of-4 USB pairs to
be connected together and is configured through a
simple 3-input control logic interface.
The MAX4989 operates from a single +2.7V to +5.5V
supply and features an internal charge pump to permit
full rail-to-rail swing. This device also features a high-
impedance shutdown mode to reduce supply current to
100nA (typ).
The MAX4989 is available in a 14-pin, 3mm x 3mm
TDFN package and operates over the extended -40°C
to +85°C temperature range.
o
Low 1µA (typ) Supply Current
o
-3dB Bandwidth: 1GHz (typ)
o
Low 5Ω (typ) R
ON
o
High-Impedance Shutdown Mode
o
Logic Inputs Control Signal Routing
o
+1.8V CMOS-Logic Compatible
o
Ultra-Small 14-Pin, 3mm x 3mm, TDFN Package
Features
o
Single +2.7V to +5.5V Supply Voltage
MAX4989
Applications
Notebook Computers
Cell Phones
PART
MAX4989ETD+
Ordering Information
TEMP RANGE
-40°C to +85°C
PIN-
PACKAGE
14 TDFN-EP*
(3mm x 3mm)
PKG
CODE
T1433-2
+Denotes
a lead-free/RoHS-compliant package.
*EP
= Exposed pad.
Pin Configuration
TOP VIEW
Y-
Y+
GND
Z+
Z-
C0
C1
1
2
3
4
5
6
7
+
14 W-
13 W+
12 GND
MAX4989
11 X+
10 X-
*EP
9
8
V
CC
C2
3mm x 3mm TDFN
*EP = EXPOSED PAD. CONNECT EP TO GROUND.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
USB 2.0 Hi-Speed 2-of-4 Crosspoint Switch
MAX4989
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to GND.)
V
CC
....................................................................... -0.3V to +6.0V
C_ ......................................................................... -0.3V to +6.0V
W_, X_, Y_, Z_ ........................................... -0.3V to (V
CC
+ 0.3V)
Continuous Current C_ .................................................... ±30mA
Continuous Current W_, X_, Y_, Z_................................ ±120mA
Peak Current W_, X_, Y_, Z_
(pulsed at 1ms, 10% duty cycle) .............................. ±240mA
Continuous Power Dissipation (T
A
= +70°C)
14-Pin TDFN (derate 24.4mW/°C above +70°C) ..... 1951mW
Junction-to-Case Thermal Resistance (Θ
JC
) (Note 1)
14-Pin TDFN ................................................................. 8°C/W
Junction-to-Ambient Thermal Resistance (Θ
JA
) (Note 1)
14-Pin TDFN ............................................................... 41°C/W
Operating Temperature Range ......................... -40°C to +85°C
Junction Temperature .................................................... +150°C
Storage Temperature Range ........................... -65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer
board. For detailed information on package thermal considerations, refer to
www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= +2.7V to +5.5V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25°C.) (Note 2)
PARAMETER
Operating Power-Supply Range
Supply Current
Shutdown Supply Current
Analog Signal Range
On-Resistance
On-Resistance Match Between
Channels
On-Resistance Flatness
Off-Leakage Current
On-Leakage Current
AC PERFORMANCE (Note 4)
On-Channel -3dB Bandwidth
Insertion Loss
Off-Isolation (Note 3) Figure 1
Crosstalk
BW
S
12
V
ISO
V
CT
R
L
= R
S
= 50Ω, V
IN
= 0dBm, Figure 1
R
L
= R
S
= 50Ω, f = 10MHz
f = 10MHz, V
IN
= 0dBm, R
L
= R
S
= 50Ω
f = 250MHz, V
IN
= 0dBm, R
L
= R
S
= 50Ω
f = 50MHz, V
IN
= 0dBm, R
L
= R
S
= 50Ω,
between adjacent pairs (Note 3), Figure 1
1
0.5
-43
-15
-50
GHz
dB
dB
dB
SYMBOL
V
CC
I
CC
I
SHDN
V
W_
, V
X_
,
V
Y_
,V
Z_
R
ON
ΔR
ON
R
FLAT
I
IN(OFF)
I
IN(ON)
V
IN
= +3.0V, I
OUT
= 10mA (Note 3)
V
CC
= +3.3V, V
IN
= +1.5V,
I
OUT
= 10mA (Note 3)
V
CC
= +3.3V, V
IN
= 0V to V
CC
,
I
OUT
= 10mA (Notes 3, 4, 5)
V
CC
= +5.5V, V
IN
= 0V or V
CC
, V
OUT
= V
CC
or 0V or unconnected (Note 3)
V
CC
= +5.5V, V
IN
= 0V or V
CC
, V
OUT
=
unconnected (Note 3)
-1
-1
Switch enabled
V
CC
= +3.3V
V
CC
= +5.5V
CONDITIONS
MIN
2.7
1
3
0.1
0
5
0.5
0.4
+1
+1
TYP
MAX
5.5
3.5
6.5
0.5
V
CC
9
UNITS
V
µA
µA
V
Ω
Ω
Ω
µA
µA
C1 = C2 = C3 = GND or V
CC
2
_______________________________________________________________________________________
USB 2.0 Hi-Speed 2-of-4 Crosspoint Switch
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +2.7V to +5.5V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25°C.) (Note 2)
PARAMETER
DYNAMIC (Note 4)
Turn-On Time
Turn-Off Time
Propagation Delay
Output Skew Between Switches
Output Skew Same Switch
Off-Capacitance
t
ON
t
OFF
t
PLH
, t
PHL
t
SK(O)
t
SK(P)
C
OFF
V
IN
= +1.5V, R
L
= 300Ω, C
L
= 35pF,
V
C_
= 0V to V
CC
, Figure 2
V
IN
= +1.5V, R
L
= 300Ω, C
L
= 35pF,
V
C_
= 0V to V
CC
, Figure 2
R
L
= R
S
= 50Ω, Figure 3
R
L
= R
S
= 50Ω, Figure 3
R
L
= R
S
= 50Ω, Figure 3
f = 1MHz, V
BIAS
= 0V, V
IN
= 0.5V
P-P
f at -3dB = 240MHz, V
BIAS
= 0V,
V
IN
= 0.5V
P-P
f = 1MHz, V
BIAS
= 0V, V
IN
= 0.5V
P-P
On-Capacitance
LOGIC INPUTS
Input Logic High
Input Logic Low
Input Logic Hysteresis
Input Leakage Current
V
IH
V
IL
V
HYST
I
IN
V
CC
= +5.5V, V
C_
= GND or V
CC
-1
75
+1
1.7
0.5
V
V
mV
µA
C
ON
f at -3dB = 240MHz, V
BIAS
= 0V,
V
IN
= 0.5V
P-P
6
pF
15
2
120
50
50
13.5
4
pF
100
6
µs
µs
ps
ps
ps
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX4989
Note 2:
Note 3:
Note 4:
Note 5:
All devices are 100% production tested at T
A
= +25°C. All temperature limits are guaranteed by design.
IN and OUT refer to input and output terminals (W_, X_, Y_, Z_) of any switch configuration.
Not production tested. Guaranteed by design.
Flatness is defined as the difference between the maximum and minimum value of on-resistance, as measured over specified
analog signal ranges.
_______________________________________________________________________________________
3
USB 2.0 Hi-Speed 2-of-4 Crosspoint Switch
MAX4989
Test Circuits/Timing Diagrams
V
OFF-ISOLATION = 20log
OUT
V
IN
50Ω
V
ON-LOSS = 20log
OUT
V
IN
CROSSTALK = 20log
OUT
V
OUT
MEAS
REF
V
OUT
V
IN
NETWORK
ANALYZER
0V OR V
CC
C_
IN
V
IN
50Ω
OFF
50Ω
MAX4989
50Ω
50Ω
IN, OUT, AND OFF DEPEND ON SWITCH CONFIGURATION.
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN IN AND OFF TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN IN AND OUT TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 1. On-Loss, Off-Isolation, and Crosstalk
MAX4989
LOGIC
INPUT
V
OUT
R
L
C_
LOGIC
INPUT
SWITCH
OUTPUT
0V
t
ON
C
L
V
OUT
0.9 x V
0UT
t
OFF
V
IH
50%
V
IL
t r < 5ns
t f < 5ns
V
N_
IN
OUT
0.9 x V
OUT
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
R
L
V
OUT
= V
IN
R
L
+ R
ON
IN AND OUT DEPEND ON SWITCH CONFIGURATION.
(
)
Figure 2. Switching Time
4
_______________________________________________________________________________________
USB 2.0 Hi-Speed 2-of-4 Crosspoint Switch
Test Circuits/Timing Diagrams (continued)
MAX4989
MAX4989
R
S
V
IN+
IN+
OUT+
R
L
R
S
V
IN-
V
OUT+
t
PLH
= t
PLHX
OR t
PLHY
t
PHL
= t
PHLX
OR t
PHLY
t
SK(0)
= |t
PLHX
- t
PLHY
| OR |t
PHLX
- t
PHLY
|
t
SK(P)
= |t
PLHX
- t
PHLX
| OR |t
PLHY
- t
PHLY
|
IN AND OUT DEPEND ON SWITCH
CONFIGURATION
IN-
OUT-
R
L
C_
V
IL
TO V
IH
V
OUT-
t
INRISE
V+
V
IN+
0V
V
CC
V
IN-
0V
t
OUTRISE
t
PLHX
V
CC
V
OUT+
0V
V
CC
V
OUT-
0V
t
PHLY
t
PLHY
50%
50%
50%
50%
10%
t
PHLX
90%
50%
50%
50%
50%
10%
t
INFALL
90%
90%
10%
t
OUTFALL
90%
10%
Figure 3. Output Signal Skew, Rise/Fall Time, Propagation Delay
_______________________________________________________________________________________
5
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