DA6180C.000
26 November, 2010
MAS6180C
This is preliminary information on a new
product under development. Micro Analog
Systems Oy reserves the right to make any
changes without notice.
AM Receiver IC
•
•
•
•
•
•
•
•
Single Band Receiver IC
High Sensitivity
Very Low Power Consumption
Wide Supply Voltage Range
Power Down Control
Control for AGC On
High Selectivity by Crystal Filter
Fast Startup Feature
DESCRIPTION
The MAS6180 AM-Receiver chip is a highly sensitive,
simple to use AM receiver specially intended to receive
time signals in the frequency range from 40 kHz to 100
kHz. Only a few external components are required for
time signal receiver. The circuit has preamplifier, wide
range automatic gain control, demodulator and output
comparator built in. The output signal can be
processed directly by an additional digital circuitry to
extract the data from the received signal. The control
for AGC (automatic gain control) can be used to switch
AGC on or off if necessary.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
Single Band Receiver IC
Highly Sensitive AM Receiver, 0.4
µV
RMS
typ.
Wide Supply Voltage Range from 1.5 V to 5.5 V
Very Low Power Consumption
Power Down Control
Fast Startup
Only a Few External Components Necessary
Control for AGC On
Wide Frequency Range from 40 kHz to 100 kHz
High Selectivity by Quartz Crystal Filter
Differential Input
APPLICATIONS
•
Single Band Time Signal Receiver WWVB (USA),
JJY (Japan), DCF77 (Germany), MSF (UK), HGB
(Switzerland) and BPC (China)
BLOCK DIAGRAM
VDD
QOP
QI
QOM
AON
Demodulator
&
Comparator
OUT
RFIP
VDD
AGC Amplifier
RFIM
Power Supply/Biasing
VDD
VSS
PDN
AGC
DEC
1 (13)
DA6180C.000
26 November, 2010
MAS6180 PAD LAYOUT
VSS pad
bonded first!
1160
µ
m
VDD
QOP
QOM
QI
AGC
OUT
MAS6180Cx
VSS
RFIM
1320
µ
m
Y-coordinate
1122
µm
955
µm
787
µm
604
µm
435
µm
258
µm
261
µm
445
µm
613
µm
802
µm
980
µm
1111
µm
RFIP
PDN
AON
DEC
DIE size = 1160
µm
x 1320
µm;
PAD size = 80
µm
x 80
µm
Note:
Because the substrate of the die is internally connected to VSS, the die has to be connected to VSS or left
floating. Please make sure that VSS is the first pad to be bonded. Pick-and-place and all component assembly
are recommended to be performed in ESD protected area.
Note:
Coordinates are pad center points where origin has been located in bottom-left corner of the silicon die.
Pad Identification
Power Supply Voltage
Positive Quartz Filter Output
Negative Quartz Filter Output
Quartz Filter Input for Crystal
AGC Capacitor
Receiver Output
Demodulator Capacitor
AGC On Control
Power Down
Positive Receiver Input
Negative Receiver Input
Power Supply Ground
Name
VDD
QOP
QOM
QI
AGC
OUT
DEC
AON
PDN
RFIP
RFIM
VSS
X-coordinate
126
µm
126
µm
126
µm
126
µm
126
µm
126
µm
1034
µm
1034
µm
1034
µm
1034
µm
1034
µm
1034
µm
Note
1
2
3
4
5
5
Notes:
1) QOM bonding pad is electrically unconnected in MAS6180C1 version
2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated)
-
the output is a current source/sink with |I
OUT
| > 5
µA
-
at power down the output is pulled to VSS (pull down switch)
3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)
-
Internal pull-up with current < 1
µA
which is switched off at power down
4) PDN = VSS means receiver on; PDN = VDD means receiver off
Fast start-up is triggered when the receiver is after power down (PDN=VDD) controlled to power up
(PDN=VSS) i.e. at the falling edge of PDN signal.
5) Receiver inputs RFIP and RFIM have both 1.4 MΩ biasing resistors towards VDD
2 (13)
DA6180C.000
26 November, 2010
6)
ABSOLUTE MAXIMUM RATINGS
All Voltages with Respect to Ground
Parameter
Supply Voltage
Input Voltage
ESD Rating
Latchup Current Limit
Operating Temperature
Storage Temperature
Symbol
V
DD
-V
SS
V
IN
V
ESD
I
LUT
T
OP
T
ST
Conditions
Min
- 0.3
V
SS
-0.3
±2
±100
-40
- 55
Max
+5.5
V
DD
+0.3
Unit
V
V
kV
mA
°
C
°
C
For all pins,
Human Body Model (HBM)
For all pins
+85
+150
Stresses beyond those listed may cause permanent damage to the device. The device may not operate under these conditions, but it will
not be destroyed.
Note:
In latchup testing the supply voltages are connected normally to the tested device. Then pulsed test current is fed to each input
separately and device current consumption is observed. If the device current consumption increases suddenly due to test current pulses
and the abnormally high current consumption continues after test current pulses are cut off then the device has gone to latch up. Current
pulse is turned on for 10 ms and off for 20 ms.
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 5.0V, Temperature = 25° unless otherwise specified.
C,
Parameter
Operating Voltage
Current Consumption
Symbol
V
DD
I
DD
Conditions
T
A
= -40°
C..+85°
C
VDD=1.5 V, Vin=0.4
µVrms
VDD=5 V, Vin=0.4
µVrms
VDD=1.5 V, Vin=20 mVrms
VDD=5 V, Vin=20 mVrms
See note below.
Min
1.5
Typ
5.0
66
68
43
45
Max
5.5
80
65
0.1
100
1
Unit
V
µA
µA
µA
kHz
µVrms
mVrms
kΩ
pF
V
µA
ms
ms
Stand-By Current
Input Frequency Range
Minimum Input Voltage
Maximum Input Voltage
Receiver Input Resistance
Receiver Input Capacitance
Input Levels |l
IN
|<0.5
µA
Output Current
V
OL
<0.2 V
DD
;V
OH
>0.8 V
DD
DCF77 Output Pulses
MSF Output Pulses
I
DDoff
f
IN
V
IN min
V
IN max
R
RFI
C
RFI
V
IL
V
IH
|I
OUT
|
T
100ms
T
200ms
T
100ms
T
200ms
T
500ms
T
200ms
T
500ms
T
800ms
T
200ms
T
500ms
T
800ms
T
200ms
T
500ms
T
800ms
T
Start
T
Delay
40
0.4
20
Differential Input,
f=77.5 kHz
V
DD
-0.35
5
1
µVrms ≤
V
IN
≤
20 mVrms, see note below!
1
µVrms ≤
V
IN
≤
20 mVrms, see note below!
1
µVrms ≤
V
IN
≤
20 mVrms, see note below!
1
µVrms ≤
V
IN
≤
20 mVrms, see note below!
1
µVrms ≤
V
IN
≤
20 mVrms, see note below!
Fast Start-up, Vin=0.4
µVrms
Fast Start-up, Vin=20 mVrms
600
1.1
0.35
15
95
195
120
220
520
200
500
800
210
505
800
200
495
790
1.3
3.5
50
WWVB Output Pulses
ms
JJY60 Output Pulses
ms
JJY40 Output Pulses
ms
Startup Time
Output Delay Time
4
100
s
ms
Note:
Stand-by current consumption may increase if V
IH
and V
IL
differ from VDD and 0 respectively.
Note:
See Note 6: Time Signal Software’s Pulse Width Recognition Limits and Table 5 on page 7!
3 (13)
DA6180C.000
26 November, 2010
TYPICAL APPLICATION
Note 1
MAS6180C1
VDD
Note 4
Optional
Control
for AGC on/hold
QI
QOM
AON
Demodulator
&
Comparator
OUT
Receiver
Output
Note 5
RFIP
Ferrite
Antenna
VDD
QOP
AGC Amplifier
RFIM
Power Supply/Biasing
VDD
VSS
PDN
AGC
C
AGC
10
µ
F
Note 2
DEC
C
DEC
47 nF
R
VDD
10
Ω
+5V
C
VDD
10
µ
F
Note 3
Power Down /
Fast Startup
Control
Figure 1.
Application circuit of internal compensation capacitance option version MAS6180C1.
4 (13)
DA6180C.000
26 November, 2010
TYPICAL APPLICATION (Continued)
Note 1: Crystals
The crystal as well as ferrite antenna frequencies are chosen according to the time-signal system (Table 1). More
detailed crystal nominal frequency is normally specified for certain load capacitance but in MAS6180 filter circuit
the load capacitance is not used. Effectively this means that most accurate filter frequency is achieved by using
about 3 Hz higher frequency crystal than the received time signal frequency. For example in DCF77 application a
77.503 kHz crystal resonates at the desired DCF77 77.500 kHz frequency when the load capacitor is missing.
Table 1.
Time-Signal System Frequencies
Time-Signal System
Location
DCF77
HGB
MSF
WWVB
JJY
BPC
Germany
Switzerland
United Kingdom
USA
Japan
China
Antenna Frequency
77.5 kHz
75 kHz
60 kHz
60 kHz
40 kHz and 60 kHz
68.5 kHz
Recommended Crystal Frequency
77.503 kHz
75.003 kHz
60.003 kHz
60.003 kHz
40.003 kHz and 60.003 kHz
68.505 kHz
The crystal shunt capacitance C
0
should be matched as well as possible with the internal shunt capacitance
compensation capacitor C
C
of MAS6180. See Compensation Capacitance Options on table 2.
Table 2 .
Compensation Capacitance Options
Device
C
C
Crystal Description
MAS6180C1
0.75 pF
For low C
0
crystals
It should be noted that grounded crystal package has reduced shunt capacitance. This value is about 85% of
floating crystal shunt capacitance. For example crystal with 1 pF floating package shunt capacitance can have
0.85 pF grounded package shunt capacitance. PCB traces of crystal should be kept at minimum to minimize
additional parasitic capacitance which can cause capacitance mismatching.
Table 3 below presents some crystal manufacturers having suitable crystals for time signal receiver application.
Table 3.
Crystal Manufacturers and Crystal Types in Alphabetical Order for Time Signal Receiver Application
Manufacturer
Crystal Type
Dimensions
Web Link
Citizen
Epson Toyocom
KDS Daishinku
Microcrystal
Seiko
Instruments
CFV-206
C-2-Type
C-4-Type
DT-261
MS3V-T1R
VTC-120
ø 2.0 x 6.0
ø 1.5 x 5.0
ø 2.0 x 6.0
ø 2.0 x 6.0
1.45 x 1.45 x 6.7
ø 1.2 x 4.7
http://www.citizen.co.jp/tokuhan/quartz/
http://www.epsontoyocom.co.jp/english/
http://www.kds.info/index_en.htm
http://www.microcrystal.com/
http://www.sii-crystal.com
5 (13)