Freescale Semiconductor
Advance Information
Document Number: MC06XS3517
Rev. 3.0, 9/2012
Smart High Side Switch Module
(Triple 6.0 mΩ and Dual 17 mΩ)
The 06XS3517 device is a five channel 12 V high side switch
module with integrated control and a high number of protective and
diagnostic functions. It is designed for automotive lighting and
industrial applications. The low R
DS(ON)
channels (three 6.0 mΩ, two
17 mΩ) can control different types of lighting applications; bulbs,
Xenon-HID lights, and LEDs. Control, device configuration, and
diagnostics are performed through a 16-bit SPI interface (3.3 V or
5.0 V). When communication with the external microcontroller or VDD
is lost, the device enters a fail-safe operation mode, but remains
operational, controllable, and protected.
The channels are controlled by an external clock signal and allow
staggered switch-on delay, to improve EMC performances.
Programmable output voltage slew rates (individually programmable)
further helps improve EMC performance. To avoid shutting off the
device upon inrush current while still being able to closely track the load
current, a dynamic over-current threshold profile is featured. Load
current in each channel can be sensed. The duty cycle of the channels
can be controlled independently and the switching frequency of each
of them can be doubled.
Features
•
•
•
•
•
•
•
•
•
•
Three 6.0 mΩ and Two 17 mΩ protected high side switches
Optional sixth channel with an external SMART MOSFET
16-bit SPI communication interface with daisy chain capability
Accurate temperature & current sensing
Fail-safe mode including autorestart
PWM with programmable switch-on delay and frequency
prescaler
Over-voltage, under-voltage, over-current, over-temperature,
and reverse battery protections
Dedicated bulb over-current protection with inrush current
handling
Sleep mode with low current consumption
Normal operating range 7.0 V to 20 V, extended operating range
6.0 V - 28 V
12 V
5.0 V
VCC
Watchdog
LIMP
FLASHER
IGN
RSTB
CLOCK
CSB
FOG
SO
SI
SCLK
CSNS
GND
FETIN
FETOUT
Smart
Switch
06XS3517
HIGH SIDE SWITCH
Bottom View
FK SUFFIX (PB-FREE)
98ART10511D
24-PIN PQFN
ORDERING INFORMATION
Device
MC06XS3517AFK
Temperature
Range (T
A
)
-40 °C to 125 °C
Package
24 PQFN
06XS3517
VBAT
CP
OUT1
OUT2
OUT3
OUT4
OUT5
12 V
MCU
Figure 1. 06XS3517 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2012. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VCC
VBAT
CP
R
UP
Vcc failure
detection
Internal
Regulator
OV/UV/POR
detections
Charge
Pump
CSB
SO
SI
SCLK
R
DWN
CLOCK
LIMP
FOG
FLASHER
IGN
RSTB
Logic
LED Control
Over-current
Detection
Open Load
Detection
Over-temperature
Detection
OUT1
Gate Drive
drain/gate clamp
OUT1
(* Park)
R
DWN
OUT2
OUT2
(* LBeam)
OUT3
(* HBeam)
OUT4
(* Fog)
OUT5
(* Flash)
Over-temperature
Prewarning
OUT3
OUT4
OUT5
CSNS
Shared Output Current
sensing pin (Analog MUX)
Current Recopy
Synchronization
VCC
Driver for an External
SMART MOSFET
FETIN
(* Sense In)
Temperature
Feedback
FETOUT
(* Logic Level)
GND
* See
06XS3517 Typical Application
Figure 2. 06XS3517 Simplified Internal Block Diagram
06XS3517
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
PIN CONNECTIONS
FLASHER
FETOUT
CLOCK
RSTB
SCLK
FOG
LIMP
VCC
CSB
Transparent
Top View
CP
GND
13 12 11 10
16
17
9
8
7
6
5
4
3
IGN
2
SO
SI
24
14
GND
23
FETIN
1
CSNS
GND
22
OUT1
Definition
OUT5
18
15
VBAT
19
OUT4
20
OUT3
21
OUT2
Figure 3. 06XS3517 Pin Connections
Table 1. 06XS3517 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on
Page 17.
Pin
Number
1
2
3
4
5
Pin Name
FETIN
IGN
RSTB
FLASHER
CLOCK
Pin Function
Input
Input
Input
Input
Input/Output
Formal Name
External FET Input
Ignition Input
(Active High)
Reset
Flasher Input
(Active High)
Clock Input
This pin receives the current sense signal of the external SMART MOSFET.
This input wakes the device. It also controls the Outputs 1 and 2 in case of Fail
mode activation. This pin has an internal pull-down resistor.
This input wakes the device. It is also used to initialize the device configuration
and fault registers through SPI. This digital pin has a passive internal pull-down.
This input wakes the device and allows control over channel 5. (FLASHER) This
pin has an internal pull-down resistor.
This pin state depends on RSTB logic level.
As long as RSTB input pin is set to logic [0], this pin is pulled up to report wake
events. Otherwise, the PWM frequency and timing are generated from this
digital clock input by the PWM module.
This pin has a passive internal pull-down.
6
7
8
LIMP
FOG
CSB
Input
Input
Input
Limp Home Input
(Active High)
FOG Input (Active
high)
Chip Select
(Active Low)
The Fail mode can be activated by this digital input. This pin has a passive
internal pull-down.
This input wakes the device. This pin has a passive internal pull-down.
When this digital signal is high, SPI signals are ignored. Asserting this pin low
starts a SPI transaction. The transaction is signaled as completed when this
signal returns high. This pin has a passive internal pull-up resistance.
06XS3517
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
Table 1. 06XS3517 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on
Page 17.
Pin
Number
9
Pin Name
SCLK
Pin Function
Input
Formal Name
SPI Clock Input
Definition
This digital input pin is connected to the master microcontroller providing the
required bit shift clock for SPI communication. This pin has a passive internal
pull-down resistance.
This data input is sampled on the positive edge of the SCLK. This pin has a
passive internal pull-down resistance.
SPI logic power supply.
SPI data is sent to the MCU by this pin. This data output changes on the
negative edge of SCLK and when CSB is high, this pin is high-impedance.
This pin outputs a logic level that can be used to control an external SMART
MOSFET. This output is also called OUT6.
If OUT6 is not used in the application, this output pin is set to logic high when
the current sense output becomes valid when CSNS sync SPI bit is set to logic
[1].
14,17,23
15
16
22
18
21
20
19
24
GND
VBAT
CP
OUT1
OUT5
OUT2
OUT3
OUT4
CSNS
Ground
Power
Output
Output
Output
Ground
Battery Input
Charge Pump
Output 1
Output 5
Output 2
Output 3
Output 4
Current Sense
Output
This pin is the ground for the logic and analog circuitry of the device.
Power supply pin.
This pin is the connection for an external tank capacitor (for internal use only).
Protected 17 mΩ high side switch output terminals.
Protected 6.0 mΩ high side switch output terminals
10
11
12
13
SI
VCC
SO
FETOUT
Input
Power
Output
Output
Master-Out Slave-
In
Logic Supply
Master-In Slave-
Out
External FET Gate
Output
This pin is outputs the current sense signal of OUT1:OUT5, FET IN current, and
it is used externally to generate a ground-referenced voltage for the
microcontroller to monitor output current. If desired, this pin can also report a
voltage proportional to the temperature on the GND flag.
OUT1:OUT5, FET in current sensing and temperature sensing are activated
through the SPI interface.
Notes
1. The pins 14, 17, and 23 must be shorted on the board.
06XS3517
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground, unless mentioned otherwise. Exceeding these ratings may cause malfunction or
permanent device damage.
Parameter
ELECTRICAL RATINGS
Over-voltage Test Range (all OUT[1:5] ON with nominal DC current)
Maximum operating voltage
Load dump (400 ms) @ 25 °C
Reverse Polarity Voltage Range (all OUT[1:5] ON with nominal DC current)
2.0 Min @ 25°C
VCC Supply Voltage
OUT[1:5] Voltage
Positive
Negative (ground disconnected)
Digital Current in Clamping Mode (SI, SCLK, CSB, RSTB, IGN, FLASHER, LIMP,
and FOG)
FETIN Input Current
I
IN
I
FETIN
V
SO
V
CC
V
OUT
40
-16
±1.0
+10
-1.0
SO, FETOUT, CLOCK, and CSNS Outputs Voltage
Outputs Clamp Energy Using Single Pulse Method (L = 2.0 mH; R = 0.0
Ω;
V
BAT
= 14 V @150 °C initial)
OUT[1,5]
OUT[2:4]
ESD Voltage
(2)
Human Body Model (HBM)
Human Body Model (HBM) OUT [1:5], VPWR, and GND
Charge Device Model (CDM)
Corner Pins (1, 13, 19, 21)
All Other Pins (2-12, 14-18, 20, 22-24)
±750
±500
E
1,5
E
2,3,4
V
ESD
±2000
±8000
30
100
V
- 0.3 to V
CC
+ 0.3
V
mA
mA
V
BAT
- 18
-0.3 to 5.5
V
V
V
BAT
28
40
V
V
Symbol
Value
Unit
mJ
Notes
2. ESD testing is performed in accordance with the Human Body Model (HBM) (C
ZAP
= 100 pF, R
ZAP
= 1500
Ω)
and the Charge Device
Model.
06XS3517
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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