NCP1532
Dual Output Step-Down
Converter 2.25 MHz
High-Efficiency, Out of
Phase Operation, Low
Quiescent Current, Source
up to 1.6 A
The NCP1532 dual step down DCDC converter is a monolithic
integrated circuit dedicated to supply core and I/O voltages of new
multimedia design in portable applications powered from 1−cell
Li−ion or 3 cell Alkaline / NiCd / NiMH batteries.
Both channels are externally adjustable from 0.9 V to 3.3 V and can
source totally up to 1.6 A, 1.0 A maximum per channel. Converters are
running at 2.25 MHz switching frequency which reduces component
size by allowing the use of small inductor (down to 1
mH)
and
capacitors and operates 180° out of phase to reduce large amount of
current demand on the battery. Automatic switching PWM/PFM mode
and synchronous rectification offer improved system efficiency. The
device can also operate into fixed frequency PWM mode for low noise
applications where low ripple and good load transients are required.
Additional features include integrated soft−start, cycle−by−cycle
current limit and thermal shutdown protection. The device can also be
synchronized to an external clock signal in the range of 2.25 MHz.
The NCP1532 is available in a space saving, ultra low profile
3x3 x 0.55 mm 10 pin
mDFN
package.
Features
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MARKING
DIAGRAM
UDFN10
MU SUFFIX
CASE 506AT
1532
AA
AaLYWG
G
Aa
L
Y
W
G
= Assembly Location
(may be 1 or 2 characters)
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTION
FB1
EN1
VIN
SW1
GND
1
2
3
4
5
(Top View)
UDFN10
10
9
8
7
6
FB2
EN2
POR
SW2
MODE/
SYNC
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Up to 97% Efficiency
50
mA
Quiescent Current
Synchronous Rectification for Higher Efficiency
2.25 MHz Switching Frequency, 180° Out of Phase
Sources up to 1.6 A, 1.0 A Maximum per Channel
Adjustable Output Voltage from 0.9 V to 3.3 V
Mode Selection Pin: Eco Mode or Low Noise Mode
2.7 V to 5.5 V Input Voltage Range
Thermal Limit Protection
Short Circuit Protection
All pins are fully ESD Protected
This is a Pb−Free Device
Cellular Phones, Smart Phones and PDAs
Digital Still Cameras
MP3 Players and Portable Audio Systems
Wireless and DSL Modems
Portable Equipment
ORDERING INFORMATION
Device
NCP1532MUAATXG
Package
UDFN10
(Pb−Free)
Shipping
†
3000 /
Tape & Reel
Typical Applications
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2011
October, 2011
−
Rev. 6
1
Publication Order Number:
NCP1532/D
NCP1532
VIN
2.2mH
3
VIN
11
5
GND
FB1
1
SW1
4
18pF
10mF
VOUT1
OFF
2.25 MHz Range
OFF
ON
2
EN1
POR
8
2.2mH
POR
ON
6
MODE/SYNC
SW2
7
18pF
VOUT2
OFF
ON
9
EN2
FB2
10
10mF
NOTE:
Exposed pad of UDFN10 package
−
named pin11
−
must be connected to system ground.
Figure 1. NCP1532 Typical Application
PIN FUNCTION DESCRIPTION
Pin
1
2
Pin Name
FB1
EN1
Type
Analog Input
Digital Input
Description
Feedback voltage from the output 1. This is the input to the error amplifier.
Enable for converter 1. This pin is active HIGH (higher than 1.2 V) and is turned off by
logic LOW (lower than 0.4 V.
Do not leave this pin floating.
Power supply input for the PFET power stage, analog and digital blocks. The pin must
be decoupled to ground by a 10
mF
ceramic capacitor.
Connection from power MOSFETs of output 1 to the Inductor.
This pin is the GROUND reference for the analog section of the IC. The pin must be
connected to the system ground by 10
mF
low ESR ceramic capacitor.
Combination Mode Selection and Oscillator Synchronization. If this pin is LOW, the
regulator runs in automatic switching PFM/PWM. With a HIGH level (equal or lower
Analog Input voltage), the converter runs in PWM mode only. This pin can be also syn-
chronized to an external clock in the range of 2.25 MHz; in this case the device runs in
PWM mode only. Insert the clock before enabling the part is recommended to force
external synchronization. Do not let this pin floating.
Following rule is being used:
”0”: Eco mode, automatic switching PFM/PWM, 180° out of phase.
“1”: Low noise, forced PWM mode, 180° out of phase.
”CLK”: External synchronization, forced PWM mode, 0° in phase.
Connection from power MOSFETs of output 2 to the Inductor.
Power On Reset. This is an open drain output. This output is shutting down when each
output voltages are less than 90% of their nominal values and goes high after 120 ms
when active outputs are within regulation. A pullup resistor around 500k should be
connected between POR and V
IN
, V
OUT1
or V
OUT2
depending on the supplied device.
Enable for converter 2. This pin is active HIGH (higher than 1.2 V) and is turned off by
logic LOW (lower than 0.4 V). Do not let this pin floating.
Feedback voltage from the output 2. This is the input to the error amplifier.
This pin is the GROUND reference for the NFET power stage of the IC. The pin must
be connected to the system ground and to both input and output capacitors.
3
4
5
6
VIN
SW1
GND
MODE/SYNC
Analog / Power
Input
Analog Output
Analog Ground
Digital Input
7
8
SW2
POR
Analog Output
Digital Output
9
10
11
EN2
FB2
Exposed Pad
Digital Input
Analog Input
Power Ground
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2
VIN or VOUT
NCP1532
BLOCK DIAGRAM
EA1
UVLO
VREF
Thermal
Shutdown
EN1
2
Logic
Control
Voltage
Reference
EA2
FB1
1
VREF
VIN
10
FB2
9
Logic
Control
EN2
VIN
3
EA1
Oscillator
EA2
VIN
8
POR
Ramp Generator
SW1
4
PVIN
Q1
AVIN
0°
PWM/PFM
Control
180°
PWM/PFM
Control
AVIN
Q3
PVIN
7
SW2
Q2
GND
5
Q4
6
MODE/SYNC
ILIMIT
ILIMIT
Figure 2. Simplified Block Diagram
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3
NCP1532
MAXIMUM RATINGS
Rating
Minimum Voltage All Pins
Maximum Voltage All Pins (Note 1)
Maximum Voltage EN1, EN2, MODE
Thermal Resistance Junction−to−Air (UDFN10 Package)
Thermal Resistance Using Recommended Board Layout (Note 8)
Operating Ambient Temperature Range (Notes 6 and 7)
Storage Temperature Range
Junction Operating Temperature (Notes 6 and 7)
Latchup Current Maximum Rating T
A
= 85°C (Note 4) Other Pins
ESD Withstand Voltage (Note 3)
Human Body Model
Machine Model
Moisture Sensitivity Level (Note 5)
Symbol
V
min
V
max
V
max
R
qJA
T
A
T
stg
T
J
L
u
V
esd
Value
−0.3
7.0
V
IN
+ 0.3
200
40
−40
to 85
−55
to 150
−40
to 150
$100
2.0
200
1
Unit
V
V
V
°C/W
°C
°C
°C
mA
kV
V
per IPC
MSL
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T
A
= 25°C
2. According JEDEC standard JESD22−A108B
3. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) per JEDEC standard: JESD22−A114
Machine Model (MM) per JEDEC standard: JESD22−A115
4. Latchup current maximum rating per JEDEC standard: JESD78.
5. JEDEC Standard: J−STD−020A.
6. In applications with high power dissipation (low V
IN
, high I
OUT
), special care must be paid to thermal dissipation issues. Board design
considerations
−
thermal dissipation vias, traces or planes and PCB material
−
can significantly improve junction to air thermal resistance
R
qJA
(for more information, see design and layout consideration section). Environmental conditions such as ambient temperature Ta brings
thermal limitation on maximum power dissipation allowed.
The following formula gives calculation of maximum ambient temperature allowed by the application: T
A(max)
= T
J(max)
−
(R
qJA
x P
d
)
Where
T
J
is the junction temperature,
P
d
is the maximum power dissipated by the device (worst case of the application), and R
qJA
is the junction−to−ambient thermal
resistance.
7. To prevent permanent thermal damages, this device include a thermal shutdown which engages at 180°C (typical).
8. Board recommended UDFN10 layout is described in Layout Considerations section.
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4
NCP1532
ELECTRICAL CHARACTERISTICS
(Typical values are referenced to T
A
= +25°C, Minimum and Maximum values are referenced
−40°C
to +85°C ambient temperature,
unless otherwise noted, operating conditions V
IN
= 3.6 V, V
OUT1
= V
OUT2
= 1.2 V, unless otherwise noted).
Rating
INPUT VOLTAGE
Input Voltage Range
Quiescent Current,
No Switching, No Load
No Load
Standby Current
Under Voltage Lockout
Under Voltage Hysteresis
ANALOG AND DIGITAL PIN
Positive Going Input High Voltage Threshold
Negative Going Input High Voltage Threshold
Digital Threshold Hysteresis
External Synchronization (Note 11)
Minimum
Maximum
POWER ON RESET
(Note 9)
Power On Reset Threshold
Power On Reset Hysteresis
Power On Reset Delay (See Page 12)
OUTPUT PERFORMANCES
Feedback Voltage Threshold
Minimum Output Voltage
Maximum Output Voltage
Output Voltage Accuracy (Note 10)
Output Voltage load regulation
NCP1532MUAATXG
Load transient response
Rise/Falltime 1
ms
Room Temperature
Overtemperature Range
Overtemperature
Load = 100 mA to 600 mA
10 mA to 100 mA load step
(PFM to PWM mode)
200 mA to 600 mA load step
(PWM to PWM mode)
V
IN
= 2.7 V to 5.5 V
3.6 V to 3.2 V Line Step
(Falltime = 50
ms)
I
OUT
= 0 mA
I
OUT
= 300 mA
Time from EN to 90% of Output
Voltage
FB1, FB2
V
FB
V
OUT
V
OUT
DV
OUT
V
LOADR
V
LOADT
−
−
−
−
−3%
−
−
−
V
LINER
V
LINET
V
RIPPLE
t
START
F
SW
D
−
−
−
−
−
1.8
−
0.6
0.9
3.3
$1%
$2%
−0.6
40
85
0.05
6.0
8.0
3.0
230
2.25
−
−
−
−
−
+3%
−
−
−
−
−
−
−
350
2.7
100
%
mV
PP
mV
PP
ms
MHz
%
V
V
V
%
%
mV
V
OUT
Falling
V
PORT
V
PORH
T
POR
−
−
−
89%
3%
116
−
−
−
V
V
ms
EN1, EN2, MODE/SYNC
EN1, EN2, MODE/SYNC
EN1, EN2, MODE/SYNC
MODE/SYNC
V
IH
V
IL
V
HYS
F
SYNC
1.2
−
−
−
−
−
−
100
1.8
3.0
−
0.4
−
−
−
V
V
mV
MHz
MODE/SYNC = GND
V
IN
I
Q
2.7
−
−
−
2.2
−
−
50
60
0.3
2.4
100
5.5
70
−
1.0
2.55
−
V
mA
Conditions
Symbol
Min
Typ
Max
Unit
EN1 = EN2 = GND
V
IN
Falling
I
STB
V
UVLO
V
UVLOH
mA
V
mV
Output Voltage Line Regulation
Load = 100 mA
Line Transient Response
Load = 100 mA
Output Voltage Ripple
Soft−Start Time
Switching Frequency
Duty Cycle
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