NCP1207A, NCP1207B
PWM Current-
-Mode
Controller for Free Running
Quasi-
-Resonant Operation
The NCP1207A/B combines a true current mode modulator and a
demagnetization detector to ensure full borderline/critical Conduction
Mode in any load/line conditions and minimum drain voltage switching
(Quasi-
-Resonant operation). Due to its inherent skip cycle capability,
the controller enters burst mode as soon as the power demand falls
below a predetermined level. As this happens at low peak current, no
audible noise can be heard. For the NCP1207A, an internal 8.0
ms
timer
prevents the free-
-run frequency to exceed 125 kHz (therefore below the
150 kHz CISPR-
-22 EMI starting limit), while the skip adjustment
capability lets the user select the frequency at which the burst foldback
takes place. For the NCP1207B, the internal timer duration is reduced to
4.5
ms
to allow operation at higher frequencies (up to 200 kHz).
The Dynamic Self-
-Supply (DSS) drastically simplifies the
transformer design in avoiding the use of an auxiliary winding to
supply the NCP1207A/B. This feature is particularly useful in
applications where the output voltage varies during operation (e.g.
battery chargers). Due to its high-
-voltage technology, the IC is
directly connected to the high-
-voltage DC rail. As a result, the
short-
-circuit trip point is not dependent upon any V
CC
auxiliary level.
The transformer core reset detection is done through an auxiliary
winding which, brought via a dedicated pin, also enables fast
Overvoltage Protection (OVP). Once an OVP has been detected, the
IC permanently latches off.
Finally, the continuous feedback signal monitoring implemented
with an overcurrent fault protection circuitry (OCP) makes the final
design rugged and reliable.
Free--Running Borderline/Critical Mode Quasi--Resonant Operation
Current--Mode with Adjustable Skip--Cycle Capability
No Auxiliary Winding V
CC
Operation
Auto--Recovery Overcurrent Protection
Latching Overvoltage Protection
External Latch Triggering, e.g. Via Overtemperature Signal
500 mA Peak Current Source/Sink Capability
Undervoltage Lockout for V
CC
Below 10 V
Internal 1.0 ms Soft--Start
Internal 8.0
ms
Minimum T
OFF
for NCP1207A,
4.5
ms
Minimum T
OFF
for NCP1207B
Adjustable Skip Level
Internal Temperature Shutdown
Direct Optocoupler Connection
SPICE Models Available for TRANsient Analysis
These are Pb--Free and Halide--Free Devices
Typical Applications
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MARKING
DIAGRAM
8
8
1
SOIC-
-8
D SUFFIX
CASE 751
1207A
ALYW
G
1
8
1207B
ALYW
G
1
8
PDIP-
-8
P SUFFIX
CASE 626
1
1207A/B/AP
A
L, WL
Y, YY
W, WW
G
or G
1
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb--Free Package
1207AP
AWL
YYWWG
8
1
SOIC-
-7
D SUFFIX
CASE 751U
8
PIN CONNECTIONS
Dmg
FB
CS
GND
1
2
3
4
8
7
6
5
HV
NC
V
CC
Drv
ORDERING INFORMATION
Device
NCP1207ADR2G
NCP1207APG
NCP1207BDR2G
Package
SOIC--8
(Pb--Free)
PDIP--8
(Pb--Free)
SOIC--7
(Pb--Free)
Shipping
†
2500/Tape & Reel
50 Units / Rail
2500/Tape & Reel
AC/DC Adapters for Notebooks, etc.
Offline Battery Chargers
Consumer Electronics (DVD Players, Set-
-Top Boxes, TVs, etc.)
Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
1
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2010
December, 2010 - Rev. 11
-
Publication Order Number:
NCP1207A/D
NCP1207A, NCP1207B
V
out
*
+
+
OVP and
Demag
NCP1207A/B
1
2
3
4
Universal Network
8
7
6
5
GND
+
*Please refer to the application information section
Figure 1. Typical Application
PIN FUNCTION DESCRIPTION
Pin
1
2
Pin Name
Demag
FB
Function
Core reset detection and OVP
Sets the peak current setpoint
Description
The auxiliary FLYBACK signal ensures discontinuous operation and offers a fixed
overvoltage detection level of 7.2 V.
By connecting an Optocoupler to this pin, the peak current setpoint is adjusted
accordingly to the output power demand. By bringing this pin below the internal
skip level, device shuts off.
This pin senses the primary current and routes it to the internal comparator via an
L.E.B. By inserting a resistor in series with the pin, you control the level at which
the skip operation takes place.
--
The driver’s output to an external MOSFET.
This pin is connected to an external bulk capacitor of typically 10
mF.
This unconnected pin ensures adequate creepage distance. (No pin on
NCP1207B)
Connected to the high--voltage rail, this pin injects a constant current into the V
CC
bulk capacitor.
3
CS
Current sense input and skip
cycle level selection
The IC ground
Driving pulses
Supplies the IC
--
High--voltage pin
4
5
6
7
8
GND
Drv
V
CC
NC
HV
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2
NCP1207A, NCP1207B
VUVLO
4.5/1.5ms
Delay
HV
7.0
mA
+
--
+
V
CC
--
+
PON
Demag
OVP
+
5.0 V
/1.44
8/4.5ms
Blanking
S
S*
R* R Q
12 V, 10 V,
5.3 V (fault)
Drv
4.2 V
Fault
Mngt.
Q
+
+
--
--
+
+
50 mV
R
int
R
esd
Demag
10 V
Driver: src = 20
sink = 10
V
CC
To Internal
Supply
GND
+
--
Overload?
Timeout
Reset
Soft--Start = 1 ms
1.0 V
/3
FB
200
mA
when Drv
is OFF
380 ns
L.E.B.
CS
*S and R are level triggered whereas S is edge
triggered. R has priority over the other inputs.
5.0
ms
Timeout
Demag
Figure 2. Internal Circuit Architecture
MAXIMUM RATINGS
Rating
Power Supply Voltage, V
CC
Pin, Continuous Voltage
Transient Power Supply Voltage, Duration < 10 ms, I
VCC
< 20 mA
Maximum Voltage on Pin 5 (Drv)
Maximum Voltage on all other pins except Pin 8 (HV), Pin 6 (V
CC
) and Pin 5 (Drv)
Maximum Current for all pins except V
CC
(6), HV (8) and Demag (1) when 10 V ESD diodes are
activated
Maximum Current in Pin 1
Thermal Resistance, Junction--to--Case
Thermal Resistance, Junction--to--Air, SOIC version
Thermal Resistance, Junction--to--Air, DIP8 version
Operating Junction Temperature
Maximum Junction Temperature
Temperature Shutdown
Hysteresis in Shutdown
Storage Temperature Range
ESD Capability, HBM Model (All pins except HV)
ESD Capability, Machine Model
Maximum Voltage on Pin 8 (HV), Pin 6 (V
CC
) decoupled to ground with 10
mF
Minimum Voltage on Pin 8 (HV), Pin 6 (V
CC
) decoupled to ground with 10
mF
Symbol
V
CC
Static
V
CC
Pulse
--
--
--
Idem
R
θJC
R
θJA
R
θJA
T
J
TJ
MAX
--
--
--
--
--
V
HVMAX
V
HVMIN
Value
20
25
20
--0.3 to 10
5.0
+3.0/--2.0
57
178
100
--40 to +125
150
155
30
--60 to +150
2.0
200
500
40
Units
V
V
V
V
mA
mA
C/W
C/W
C/W
C
C
C
C
C
kV
V
V
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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3
NCP1207A, NCP1207B
V
CC
= 11 V unless otherwise noted)
DYNAMIC SELF-
-SUPPLY
V
CC
Increasing Level at which the Current Source Turns--off
V
CC
Decreasing Level at which the Current Source Turns--on
V
CC
Decreasing Level at which the Latchoff Phase Ends
V
CC
Level at which Output Pulses are Disabled
Internal IC Consumption, No Output Load on Pin 5,
F
SW
= 60 kHz
Internal IC Consumption, 1.0 nF Output Load on Pin 5,
F
SW
= 60 kHz
Internal IC Consumption in Latchoff Phase
INTERNAL STARTUP CURRENT SOURCE
(T
J
>
0C)
High--voltage Current Source, V
CC
= 10 V
High--voltage Current Source, V
CC
= 0
DRIVE OUTPUT
Output Voltage Rise--time @ CL = 1.0 nF, 10--90% of Output Signal
Output Voltage Fall--time @ CL = 1.0 nF, 10--90% of Output Signal
Source Resistance
Sink Resistance
CURRENT COMPARATOR
(Pin 5 Unloaded)
Input Bias Current @ 1.0 V Input Level on Pin 3
Maximum Internal Current Setpoint
Propagation Delay from Current Detection to Gate OFF State
Leading Edge Blanking Duration
Internal Current Offset Injected on the CS Pin during OFF Time
OVERVOLTAGE SECTION
(V
CC
= 11 V)
Sampling Delay after ON Time
OVP Internal Reference Level
FEEDBACK SECTION
(V
CC
= 11 V, Pin 5 Loaded by 1.0 kΩ)
Internal Pull--up Resistor
Pin 3 to Current Setpoint Division Ratio
Internal Soft--start
DEMAGNETIZATION DETECTION BLOCK
Input Threshold Voltage (Vpin 1 Decreasing)
Hysteresis (Vpin 1 Decreasing)
Input Clamp Voltage
Demag Propagation Delay
Internal Input Capacitance at Vpin 1 = 1.0 V
Minimum T
OFF
(Internal Blanking Delay after T
ON
)
Timeout After Last Demag Transition
Pin 1 Internal Impedance
1. Max value at T
J
= 0C.
NCP1207A
NCP1207B
High State (Ipin 1 = 3.0 mA)
Low State (Ipin 1 = --2.0 mA)
1
1
1
1
1
1
1
1
1
V
th
V
H
VC
H
VC
L
T
dem
C
par
T
blank
T
out
R
int
35
--
8.0
--0.9
--
--
--
3.5
--
--
50
20
10
--0.7
210
10
8.0
4.5
5.0
28
90
--
12
--0.5
--
--
--
5.5
--
--
mV
mV
V
V
ns
pF
ms
ms
kΩ
2
--
--
Rup
Iratio
Tss
--
--
--
20
3.3
1.0
--
--
--
kΩ
--
ms
NCP1207A
NCP1207B
1
1
T
sample
V
ref
--
6.4
4.5
1.5
7.2
--
8.0
ms
V
3
3
3
3
3
I
IB
I
Limit
T
DEL
T
LEB
Iskip
--
0.92
--
--
--
0.02
1.0
100
380
200
--
1.12
160
--
--
mA
V
ns
ns
mA
5
5
5
5
T
r
T
f
R
OH
R
OL
--
--
12
5.0
40
20
20
10
--
--
36
19
ns
ns
Ω
Ω
8
8
IC1
IC2
4.3
--
7.0
8.0
9.6
--
mA
mA
6
6
6
6
6
6
6
VCC
OFF
VCC
ON
VCC
latch
UVLO
ICC1
ICC2
ICC3
10.8
9.1
--
--
--
--
--
12
10
5.3
VCC
ON
--200mV
1.0
1.6
330
12.9
10.6
--
--
1.3
(Note 1)
2.0
(Note 1)
--
V
V
V
V
mA
mA
mA
ELECTRICAL CHARACTERISTICS
(For typical values T
J
= 25C, for min/max values T
J
= 0C to +125C, Max T
J
= 150C,
Rating
Pin
Symbol
Min
Typ
Max
Unit
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4
NCP1207A, NCP1207B
1.6
1.4
1.2
I
CC1
(mA)
I
CC2
(mA)
1.0
0.8
0.6
0.4
--50
2.3
2.1
1.9
1.7
1.5
1.3
1.1
--50
--25
0
25
50
75
100
125
--25
0
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 3. Internal IC Consumption (No Output
Load) versus Temperature
12.9
12.4
VCC
OFF
(V)
11.9
11.4
VCC
ON
(V)
10.8
Figure 4. Internal IC Consumption (1.0 nF
Output Load) versus Temperature
10.3
9.8
10.9
10.4
--50
9.3
--25
0
25
50
75
100
125
8.8
--50
--25
0
25
50
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 5. VCC Increasing Level at which the
Current Source Turns-
-Off versus Temperature
Figure 6. VCC Decreasing Level at which the
Current Source Turns-
-On versus Temperature
12
11
10
R
OH
& R
OL
(Ω)
9
I
C1
(mA)
8
7
6
5
4
3
2
--50
--25
0
25
50
75
100
125
40
35
30
25
20
15
10
5
0
--50
--25
0
25
50
R
OL
R
OH
75
100
125
TEMPERATURE (C)
TEMPERATURE (C)
Figure 7. Internal Startup Current Source at
V
CC
= 10 V versus Temperature
Figure 8. Source and Sink Resistance versus
Temperature
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5
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