Techwell
4-CH WD1 (960H)/D1 Compatible Video Decoder
and Audio Codec
TW2974
Features
Video Decoder
WD1 (960H) and D1 compatible video decoding
operation and each channel is programmable
NTSC (M, 4.43) and PAL (B, D, G, H, I, M, N, N
combination), PAL (60) support with automatic
format detection
Built-in analog anti-alias filter
Four 10-bit ADCs and analog clamping circuit for
CVBS input
Fully programmable static gain or automatic gain
control for the Y channel
Programmable white peak control for CVBS
channel
4-H adaptive comb filter Y/C separation
PAL delay line for color phase error correction
Image enhancement with peaking and CTI
Digital sub-carrier PLL for accurate color decoding
Digital Horizontal PLL for synchronization
processing and pixel sampling
Advanced synchronization processing and sync
detection for handling non-standard and weak
signal
Programmable hue, brightness, saturation,
contrast, sharpness
Automatic color control and color killer
ITU-R 656 like YCbCr (4:2:2) output or time
multiplexed output with 36/72/144MHz for WD1
or 27/54/108MHz for D1 format
Audio Codec
Integrated five audio ADCs processing and one
audio DAC
Provides multi-channel audio mixed analog output
Supports I2S/DSP Master/Slave interface for
record output and playback input
PCM 8/16-bit and u-Law/A-Law 8-bit for audio
word length
Programmable audio sample rate that covers
popular frequencies of 8/16/32/44.1/48kHz
Miscellaneous
Embedded PTZ Tx pulse generation
Two-wire MPU serial bus interface
Integrated clock PLL for 144/108MHz clock
output
Power save and Power down mode
Low power consumption
Single 27MHz crystal for all standards and both
WD1 and D1 format
3.3V tolerant I/O
1.0V/3.3V power supply
128-pin LQFP package (pin compatible with
TW2964 128-LQFP version)
1
FN8403.1
March 13, 2013
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774|Copyright Intersil Americas LLC 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
.
TW2974
BT.656
Interface
4H Comb
Video Decoder
Decimation Filter
VD1[7:0]
VD2[7:0]
VD3[7:0]
VD4[7:0]
MPP1
MPP2
MPP3
MPP4
CLKPO
XTO
XTI
CLKNO
SCLK
SDAT
IRQ
ACLKR
ASYNR
ADATR
ADATM
ACLKP
ASYNP
ADATP
VIN1
ADC
ADC
AIN1
ADC
ADC
VIN2
ADC
ADC
4H Comb
Video Decoder
Decimation Filter
VIN3
ADC
ADC
4H Comb
Video Decoder
Decimation Filter
AIN3
ADC
ADC
VIN4
ADC
ADC
4H Comb
Video Decoder
Decimation Filter
AIN4
ADC
ADC
AIN_AUX1
(AIN51)
AOUT
ADC
Decimation Filter
DAC
Interpolation Filter
FIGURE 1. TW2974 VIDEO BLOCK DIAGRAM
For additional products, see
www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at
www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or
specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders.
Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its
use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see
www.intersil.com
I2S
Interface
Host
Interface
Clock PLL
Clock
Generator
AIN2
ADC
ADC
MPP
Interface
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
