NVMFD5852NL
Power MOSFET
40 V, 6.9 mW, 44 A, Dual N−Channel Logic
Level, Dual SO−8FL
Features
•
•
•
•
Small Footprint (5x6 mm) for Compact Designs
Low R
DS(on)
to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
NVMFD5852NLWF − Wettable Flanks Option for Enhanced Optical
Inspection
•
AEC−Q101 Qualified and PPAP Capable
•
This is a Pb−Free Device
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent R
YJ−mb
(Notes 1,
2, 3, 4)
Power Dissipation
R
YJ−mb
(Notes 1, 2, 3)
Continuous Drain Cur-
rent R
qJA
(Notes 1, 3
& 4)
Power Dissipation
R
qJA
(Notes 1 & 3)
Pulsed Drain Current
T
mb
= 25°C
Steady
State
T
mb
= 100°C
T
mb
= 25°C
T
mb
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
I
DM
T
J
, T
stg
I
S
E
AS
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
40
"20
44
31
27
13
15
10.6
3.2
1.6
329
−55 to
175
40
80
A
°C
A
mJ
W
A
W
Unit
V
V
A
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V
(BR)DSS
40 V
12.0 mW @ 4.5 V
Dual N−Channel
D1
D2
R
DS(on)
MAX
6.9 mW @ 10 V
44 A
I
D
MAX
G1
S1
G2
S2
MARKING DIAGRAM
D1 D1
1
DFN8 5x6
(SO8FL)
CASE 506BT
S1
G1
S2
G2
5852xx
AYWZZ
D2 D2
D1
D1
D2
D2
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, V
GS
= 10 V, I
L(pk)
= 40 A,
L = 0.1 mH, R
G
= 25
W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
5852NL = Specific Device Code
for NVMFD5852NL
5852LW = Specific Device Code
for NVMFD5852NLWF
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
Device
Package
DFN8
(Pb−Free)
DFN8
(Pb−Free)
Shipping
†
1500 / Tape &
Reel
1500 / Tape &
Reel
THERMAL RESISTANCE MAXIMUM RATINGS
(Note 1)
Parameter
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3)
Junction−to−Ambient − Steady State (Note 3)
Symbol
R
YJ−mb
R
qJA
Value
5.6
°C/W
47
Unit
NVMFD5852NLT1G
NVMFD5852NLWFT1G
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second are higher but are dependent
on pulse duration and duty cycle.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2014
1
September, 2014 − Rev. 6
Publication Order Number:
NVMFD5852NL/D
NVMFD5852NL
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 5)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
Drain−to−Source On Resistance
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
C
iss
C
oss
C
rss
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
Q
G(TOT)
V
GS
= 10 V, V
DS
= 32V, I
D
= 20 A
V
GS
= 4.5 V, V
DS
= 32 V,
I
D
= 20 A
V
GS
= 0 V, f = 1.0 MHz, V
DS
= 25 V
1800
240
180
20
1.5
5.5
10.9
36
nC
nC
pF
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
g
FS
V
GS
= 10 V, I
D
= 20 A
V
GS
= 4.5 V, I
D
= 20 A
V
DS
= 5 V, I
D
= 5 A
V
GS
= V
DS
, I
D
= 250
mA
1.4
6.3
5.3
8.7
24
6.9
12
S
2.4
V
mV/°C
mW
V
(BR)DSS
V
(BR)DSS
/T
J
I
DSS
I
GSS
V
GS
= 0 V,
V
DS
= 40 V
T
J
= 25°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
40
37.3
1.0
100
±100
nA
V
mV/°C
mA
Symbol
Test Condition
Min
Typ
Max
Unit
V
DS
= 0 V, V
GS
=
±20
V
SWITCHING CHARACTERISTICS
(Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
T
J
= 25°C
T
J
= 125°C
V
GS
= 10 V, V
DS
= 32 V,
I
D
= 20 A, R
G
= 2.5
W
V
GS
= 4.5 V, V
DS
= 32 V,
I
D
= 20 A, R
G
= 2.5
W
12
52
21
13
12
8.0
27
5.0
ns
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
V
SD
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, d
IS
/d
t
= 100 A/ms,
I
S
= 20 A
V
GS
= 0 V,
I
S
= 20 A
0.84
0.69
22.3
12.8
9.4
15.2
nC
ns
1.1
V
5. Pulse Test: pulse width = 300
ms,
duty cycle
v
2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NVMFD5852NL
TYPICAL CHARACTERISTICS
150
10 V
I
D
, DRAIN CURRENT (A)
125
T
J
= 25°C
100
75
50
3.6 V
25
0
0
1
2
3
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
3.4 V
3.0 V
0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
4.4 V
150
5.0 V
I
D
, DRAIN CURRENT (A)
125
100
75
50
25
T
J
= 125°C
T
J
= −55°C
T
J
= 25°C
V
DS
≥
10 V
7.0 V
4.0 V
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
2
3
4
5
6
7
8
9
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
I
D
= 20 A
T
J
= 25°C
0.0200
0.0175
0.0150
0.0125
0.0100
0.0075
Figure 2. Transfer Characteristics
T
J
= 25°C
V
GS
= 4.5 V
V
GS
= 10 V
0.0050
0.0025
0
0
25
50
75
100
125
150
I
D
, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. V
GS
2.2
R
DS(on)
, DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
−50 −25
100
0
25
50
75
100
125
150
175
I
D
= 20 A
V
GS
= 10 V
I
DSS
, LEAKAGE (nA)
10,000
100,000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
V
GS
= 0 V
T
J
= 150°C
T
J
= 125°C
1,000
5
10
15
20
25
30
35
40
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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NVMFD5852NL
TYPICAL CHARACTERISTICS
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
2500
C
iss
V
GS
= 0 V
T
J
= 25°C
10
Q
T
8
C, CAPACITANCE (pF)
2000
1500
6
Q
gs
4
Q
gd
T
J
= 25°C
V
DS
= 32 V
I
D
= 20 A
0
5
10
15
20
25
30
35
40
1000
C
oss
C
rss
0
0
10
20
30
40
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
500
2
0
Q
g
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
1000
I
S
, SOURCE CURRENT (A)
V
DS
= 32 V
I
D
= 20 A
V
GS
= 4.5 V
t, TIME (ns)
t
r
100
t
f
t
d(off)
t
d(on)
100
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
V
GS
= 0 V
75
50
T
J
= 25°C
25
10
1
10
R
G
, GATE RESISTANCE (W)
100
0
0.60 0.65 0.70
0.75 0.80 0.85 0.90 0.95 1.00 1.05
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
Figure 10. Diode Forward Voltage vs. Current
10
ms
I
D
, DRAIN CURRENT (A)
10
100
ms
1 ms
1
0.1
V
GS
= 10 V
Single Pulse
T
C
= 25°C
R
DS(on)
Limit
Thermal Limit
Package Limit
0.1
1
10
10 ms
dc
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NVMFD5852NL
TYPICAL CHARACTERISTICS
100
Duty Cycle = 50%
10 20%
10%
5%
1
2%
1%
R
qJA
(°C/W)
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
PULSE TIME (sec)
0.1
1
10
100
1000
Figure 12. Thermal Response
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